[Mlir-commits] [mlir] [MLIR][NVVM] Add support for f8x2 conversion (PR #137781)
Srinivasa Ravi
llvmlistbot at llvm.org
Wed Apr 30 03:33:56 PDT 2025
================
@@ -1120,6 +1120,110 @@ def NVVM_CvtToF6x2Op : NVVM_Op<"cvt.to.f6x2"> {
}];
}
+def CVTFP8E4M3 : I32EnumAttrCase<"E4M3", 0, "e4m3">;
+def CVTFP8E5M2 : I32EnumAttrCase<"E5M2", 1, "e5m2">;
+def CVTFP8UE8M0 : I32EnumAttrCase<"UE8M0", 2, "ue8m0">;
+
+def CVTFP8Type : I32EnumAttr<"CVTFP8Type", "NVVM CVTFP8Type kind",
+ [CVTFP8E4M3, CVTFP8E5M2, CVTFP8UE8M0]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::NVVM";
+}
+def CVTFP8TypeAttr : EnumAttr<NVVM_Dialect, CVTFP8Type, "cvt_fp8_type"> {
+ let assemblyFormat = "`<` $value `>`";
+}
+
+def NVVM_CvtToF8x2Op : NVVM_Op<"cvt.to.f8x2"> {
+ let summary = "Convert a pair of f32 or fp16 inputs to f8x2";
+ let description = [{
+ This Op converts each of the given float input types to the specified f8
+ type.
+ The result `dst` is either represented as an i16 type or a vector
+ of two f8 types.
+ The following table describes the supported conversions and their formats:
+ ```
+ |-----------|-----------|--------------------------------------------------|
+ | Src Type | Dst Type | Description |
+ |-----------|-----------|--------------------------------------------------|
+ | f16x2 | e4m3x2 | Only operand `a` must be provided and it must |
+ | | e5m2x2 | be a vector of two F16s. |
+ | | | If `dst` is returned as an i16 type, the |
+ | | | converted values are packed such that the |
+ | | | value converted from the first element of `a` |
+ | | | is stored in the upper 8 bits of `dst` and the |
+ | | | value converted from the second element of `a` |
+ | | | is stored in the lower 8 bits of `dst`. |
+ | | | If `dst` is returned as a vector type, each |
+ | | | converted value from `a` is stored as an i8 |
+ | | | element in the vector. |
+ |-----------|-----------|--------------------------------------------------|
+ | bf16x2 | ue8m0x2 | Only operand `a` must be provided and it must |
+ | | | be a vector of two BF16s. |
+ | | | If `dst` is returned as an i16 type, the |
+ | | | converted values are packed such that the |
+ | | | value converted from the first element of `a` |
+ | | | is stored in the upper 8 bits of `dst` and the |
+ | | | value converted from the second element of `a` |
+ | | | is stored in the lower 8 bits of `dst`. |
+ | | | If `dst` is returned as a vector type, each |
+ | | | converted value from `a` is stored as an i8 |
+ | | | element in the vector. |
+ |-----------|-----------|--------------------------------------------------|
+ | f32, f32 | e4m3x2 | Both operands `a` and `b` must be provided and |
+ | | e5m2x2 | they must be F32 values. |
+ | | ue8m0x2 | If `dst` is returned as an i16 type, the |
+ | | | converted values are packed such that the |
+ | | | value converted from `a` is stored in the |
+ | | | upper 8 bits of `dst` and the value converted |
+ | | | from `b` is stored in the lower 8 bits of |
+ | | | `dst`. If `dst` is returned as a vector type, |
+ | | | each converted value is stored as an i8 |
+ | | | element in the vector. |
+ |-----------|-----------|--------------------------------------------------|
----------------
Wolfram70 wrote:
That makes a lot of sense. I also think with the different possible operand types currently, it makes more sense for them to be different Ops instead. I will work on this, thanks!
https://github.com/llvm/llvm-project/pull/137781
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