[Mlir-commits] [mlir] [mlir][vector] Standardize `base` Naming Across Vector Ops (NFC) (PR #137859)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Tue Apr 29 11:41:17 PDT 2025


github-actions[bot] wrote:

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp mlir/lib/Dialect/MemRef/Transforms/ExtractAddressComputations.cpp mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp mlir/lib/Dialect/NVGPU/Transforms/Utils.cpp mlir/lib/Dialect/NVGPU/Utils/MMAUtils.cpp mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp mlir/lib/Dialect/Vector/IR/VectorOps.cpp mlir/lib/Dialect/Vector/Transforms/BufferizableOpInterfaceImpl.cpp mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp mlir/lib/Dialect/Vector/Transforms/SubsetOpInterfaceImpl.cpp mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
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View the diff from clang-format here.
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diff --git a/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp b/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
index b55fe306d..cc5623068 100644
--- a/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
+++ b/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
@@ -198,8 +198,7 @@ static Value generateInBoundsCheck(
   Location loc = xferOp.getLoc();
   ImplicitLocOpBuilder lb(xferOp.getLoc(), b);
   if (!xferOp.isDimInBounds(0) && !isBroadcast) {
-    Value memrefDim =
-        vector::createOrFoldDimOp(b, loc, xferOp.getBase(), *dim);
+    Value memrefDim = vector::createOrFoldDimOp(b, loc, xferOp.getBase(), *dim);
     AffineExpr d0, d1;
     bindDims(xferOp.getContext(), d0, d1);
     Value base = xferOp.getIndices()[*dim];
@@ -1567,8 +1566,7 @@ struct Strategy1d<TransferReadOp> {
         b, xferOp, iv, dim, TypeRange(xferOp.getVectorType()),
         /*inBoundsCase=*/
         [&](OpBuilder &b, Location loc) {
-          Value val =
-              b.create<memref::LoadOp>(loc, xferOp.getBase(), indices);
+          Value val = b.create<memref::LoadOp>(loc, xferOp.getBase(), indices);
           return b.create<vector::InsertElementOp>(loc, val, vec, iv);
         },
         /*outOfBoundsCase=*/
diff --git a/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp b/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
index 30145ea32..adcee1933 100644
--- a/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
+++ b/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
@@ -231,10 +231,10 @@ struct TransferWriteLowering
         vecTy.getShape(), vecTy.getElementType(),
         /*array_length=*/1, /*boundary_check=*/writeOp.hasOutOfBoundsDim(),
         xegpu::MemorySpace::Global);
-    xegpu::CreateNdDescOp ndDesc = createNdDescriptor(
-        rewriter, loc, descType,
-        dyn_cast<TypedValue<MemRefType>>(writeOp.getBase()),
-        writeOp.getIndices());
+    xegpu::CreateNdDescOp ndDesc =
+        createNdDescriptor(rewriter, loc, descType,
+                           dyn_cast<TypedValue<MemRefType>>(writeOp.getBase()),
+                           writeOp.getIndices());
 
     // By default, no specific caching policy is assigned.
     xegpu::CachePolicyAttr hint = nullptr;
diff --git a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
index 5a09a717c..c49df88f3 100644
--- a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+++ b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
@@ -4954,8 +4954,7 @@ public:
       return failure();
     vector::TransferWriteOp writeToModify = writeOp;
 
-    auto defWrite =
-        writeOp.getBase().getDefiningOp<vector::TransferWriteOp>();
+    auto defWrite = writeOp.getBase().getDefiningOp<vector::TransferWriteOp>();
     while (defWrite) {
       if (checkSameValueWAW(writeOp, defWrite)) {
         rewriter.modifyOpInPlace(writeToModify, [&]() {
diff --git a/mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp b/mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
index 795ab0ba7..5b81d0d33 100644
--- a/mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
@@ -477,9 +477,9 @@ struct TransferReadToVectorLoadLowering
           read.getLoc(), unbroadcastedVectorType, read.getBase(),
           read.getIndices(), read.getMask(), fill);
     } else {
-      res = rewriter.create<vector::LoadOp>(
-          read.getLoc(), unbroadcastedVectorType, read.getBase(),
-          read.getIndices());
+      res = rewriter.create<vector::LoadOp>(read.getLoc(),
+                                            unbroadcastedVectorType,
+                                            read.getBase(), read.getIndices());
     }
 
     // Insert a broadcasting op if required.
@@ -570,8 +570,8 @@ struct TransferWriteToVectorStoreLowering
             });
 
       rewriter.create<vector::MaskedStoreOp>(
-          write.getLoc(), write.getBase(), write.getIndices(),
-          write.getMask(), write.getVector());
+          write.getLoc(), write.getBase(), write.getIndices(), write.getMask(),
+          write.getVector());
     } else {
       rewriter.create<vector::StoreOp>(write.getLoc(), write.getVector(),
                                        write.getBase(), write.getIndices());
diff --git a/mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp b/mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
index f948fa22a..256c8cb69 100644
--- a/mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
@@ -202,8 +202,8 @@ createSubViewIntersection(RewriterBase &b, VectorTransferOpInterface xferOp,
   auto isaWrite = isa<vector::TransferWriteOp>(xferOp);
   xferOp.zipResultAndIndexing([&](int64_t resultIdx, int64_t indicesIdx) {
     using MapList = ArrayRef<ArrayRef<AffineExpr>>;
-    Value dimMemRef = b.create<memref::DimOp>(xferOp.getLoc(),
-                                              xferOp.getBase(), indicesIdx);
+    Value dimMemRef =
+        b.create<memref::DimOp>(xferOp.getLoc(), xferOp.getBase(), indicesIdx);
     Value dimAlloc = b.create<memref::DimOp>(loc, alloc, resultIdx);
     Value index = xferOp.getIndices()[indicesIdx];
     AffineExpr i, j, k;

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https://github.com/llvm/llvm-project/pull/137859


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