[Mlir-commits] [mlir] [mlir][amdgpu] Define an amdgpu.scaling_mfma wrapper (PR #137498)

[llvmlistbot at llvm.org]

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@@ -830,4 +830,52 @@ def AMDGPU_GatherToLDSOp :
   let hasVerifier = 1;
 }
 
+def AMDGPU_ScaledMFMAOp :
+    AMDGPU_Op<"scaled_mfma", [AllTypesMatch<["destC", "destD"]>,
+                        Pure]>,
+    Arguments<(ins
+                   I32Attr:$m,
+                   I32Attr:$n,
+                   I32Attr:$k,
+                   MFMAInTypes:$sourceA,
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Muzammiluddin-Syed-ECE wrote:

Given [this line of code](https://github.com/llvm/llvm-project/blob/8ba3a232d1985a75cf771f8832e911b6f8abe86b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp#L809), can I assume that the `ScaledMFMAOutTypes` will only ever be a vector of element type F32?

https://github.com/llvm/llvm-project/pull/137498