[Mlir-commits] [mlir] [mlir][vector] Add more patterns to Vector Linearize transformation (PR #136193)

[Nishant Patel]

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@@ -27,6 +27,10 @@
 using namespace mlir;
 
 static bool isLessThanTargetBitWidth(Operation *op, unsigned targetBitWidth) {
+  // For BW-0, all operations are legal
+  if (targetBitWidth == 0)
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nbpatel wrote:

yes go ahead and merge it

https://github.com/llvm/llvm-project/pull/136193