[Mlir-commits] [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)

Shilei Tian llvmlistbot at llvm.org
Fri Apr 25 09:13:30 PDT 2025


================
@@ -4395,6 +4395,11 @@ void Verifier::visitAllocaInst(AllocaInst &AI) {
     verifySwiftErrorValue(&AI);
   }
 
+  if (TT.isAMDGPU()) {
+    Check(AI.getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS,
+          "alloca on amdgpu must be in addrspace(5)", &AI);
----------------
shiltian wrote:

> That's why I suggested that a way to handle the generic case is to allow specifying a list of alloca address spaces in data layout, in which case we could say that it must be part of that list. We just can't limit this to a single address space for all targets.

Sure. I can initiate an RFC and make a PR to add the support in the DL. IIUC, after that change, we can assert that alloca **must** be in one of the ASs right?

https://github.com/llvm/llvm-project/pull/135820


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