[Mlir-commits] [mlir] [mlir][vector] Sink vector.extract/splat into load/store ops (PR #134389)

[Andrzej Warzyński]

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@@ -1043,6 +1047,144 @@ class ExtractOpFromElementwise final
   }
 };
 
+static bool isSupportedMemSinkElementType(Type type) {
+  if (isa<IndexType>(type))
+    return true;
+
+  // Non-byte-aligned types are tricky, skip them.
+  return type.isIntOrFloat() && type.getIntOrFloatBitWidth() % 8 == 0;
+}
+
+/// Pattern to rewrite vector.extract(vector.load) -> vector/memref.load.
+///
+/// Example:
+/// ```
+///  vector.load %arg0[%arg1] : memref<?xf32>, vector<4xf32>
+///  vector.extract %0[1] : f32 from vector<4xf32>
+/// ```
+/// Gets converted to:
+/// ```
+/// %c1 = arith.constant 1 : index
+/// %0 = arith.addi %arg1, %c1 overflow<nsw> : index
+/// %1 = memref.load %arg0[%0] : memref<?xf32>
+/// ```
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banach-space wrote:

Would you mind adding a note that sub-bytes are not supported? It's  a key design decision to me.

https://github.com/llvm/llvm-project/pull/134389