[Mlir-commits] [mlir] [mlir][linalg][gpu] Clean up printing. NFC. (PR #136330)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Fri Apr 18 10:39:14 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-linalg
Author: Jakub Kuderski (kuhar)
<details>
<summary>Changes</summary>
* Use `llvm::interleaved` from #<!-- -->135517 to simplify printing
* Avoid needless vector allocations
---
Full diff: https://github.com/llvm/llvm-project/pull/136330.diff
2 Files Affected:
- (modified) mlir/lib/Dialect/GPU/IR/GPUDialect.cpp (+1-3)
- (modified) mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (+13-27)
``````````diff
diff --git a/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp b/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
index 9391d2c4ec840..f20126618060a 100644
--- a/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
+++ b/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
@@ -451,9 +451,7 @@ static void printAsyncDependencies(OpAsmPrinter &printer, Operation *op,
return;
if (asyncTokenType)
printer << ' ';
- printer << '[';
- llvm::interleaveComma(asyncDependencies, printer);
- printer << ']';
+ printer << llvm::interleaved_array(asyncDependencies);
}
// GPU Memory attributions functions shared by LaunchOp and GPUFuncOp.
diff --git a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
index 1c160911ce780..6c680498af2ad 100644
--- a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
+++ b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
@@ -47,6 +47,7 @@
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/TypeSwitch.h"
#include "llvm/Support/FormatVariadic.h"
+#include "llvm/Support/InterleavedRange.h"
#include "llvm/Support/LogicalResult.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
@@ -3660,17 +3661,13 @@ ParseResult MatmulOp::parse(OpAsmParser &parser, OperationState &result) {
}
void MatmulOp::print(OpAsmPrinter &p) {
- SmallVector<Attribute, 3> indexingMaps = llvm::map_to_vector(
+ SmallVector<Attribute, 3> indexingMaps = llvm::map_to_vector<3>(
MatmulOp::getDefaultIndexingMaps(getContext()),
[](AffineMap map) -> Attribute { return AffineMapAttr::get(map); });
- if (!llvm::equal(getIndexingMaps(), indexingMaps)) {
- p << " indexing_maps = [";
- llvm::interleaveComma(getIndexingMaps(), p,
- [&](Attribute attr) { p.printAttribute(attr); });
- p << "]";
- }
+ if (!llvm::equal(getIndexingMaps(), indexingMaps))
+ p << " indexing_maps = " << llvm::interleaved_array(getIndexingMaps());
- SmallVector<StringRef, 3> elidedAttrs = {
+ std::array<StringRef, 3> elidedAttrs = {
"operandSegmentSizes", "linalg.memoized_indexing_maps", "indexing_maps"};
printNamedStructuredOp(p, getOperation(), getInputs(), getOutputs(),
elidedAttrs);
@@ -3777,10 +3774,7 @@ ParseResult ContractOp::parse(OpAsmParser &parser, OperationState &result) {
}
void ContractOp::print(OpAsmPrinter &p) {
- p << " indexing_maps = [";
- llvm::interleaveComma(getIndexingMaps(), p,
- [&](Attribute attr) { p.printAttribute(attr); });
- p << "]";
+ p << " indexing_maps = " << llvm::interleaved_array(getIndexingMaps());
printNamedStructuredOp(
p, getOperation(), getInputs(), getOutputs(),
/*elidedAttrs=*/{"indexing_maps", "operandSegmentSizes"});
@@ -4013,17 +4007,13 @@ ParseResult BatchMatmulOp::parse(OpAsmParser &parser, OperationState &result) {
}
void BatchMatmulOp::print(OpAsmPrinter &p) {
- SmallVector<Attribute, 3> indexingMaps = llvm::map_to_vector(
+ SmallVector<Attribute, 3> indexingMaps = llvm::map_to_vector<3>(
BatchMatmulOp::getDefaultIndexingMaps(getContext()),
[](AffineMap map) -> Attribute { return AffineMapAttr::get(map); });
- if (!llvm::equal(getIndexingMaps(), indexingMaps)) {
- p << " indexing_maps = [";
- llvm::interleaveComma(getIndexingMaps(), p,
- [&](Attribute attr) { p.printAttribute(attr); });
- p << "]";
- }
+ if (!llvm::equal(getIndexingMaps(), indexingMaps))
+ p << " indexing_maps = " << llvm::interleaved_array(getIndexingMaps());
- SmallVector<StringRef, 3> elidedAttrs = {
+ std::array<StringRef, 3> elidedAttrs = {
"operandSegmentSizes", "linalg.memoized_indexing_maps", "indexing_maps"};
::printNamedStructuredOp(p, getOperation(), getInputs(), getOutputs(),
elidedAttrs);
@@ -4204,17 +4194,13 @@ void ElementwiseOp::print(OpAsmPrinter &p) {
getArityGroupAsUInt(getArityGroupAndKind(getKind()).arityGroup);
unsigned numDims = getResultRank();
- SmallVector<Attribute, 3> indexingMaps = llvm::map_to_vector(
+ SmallVector<Attribute, 3> indexingMaps = llvm::map_to_vector<3>(
ElementwiseOp::getDefaultIndexingMaps(arity + 1 /*output*/, numDims,
getContext()),
[](AffineMap map) -> Attribute { return AffineMapAttr::get(map); });
- if (!llvm::equal(getIndexingMaps(), indexingMaps)) {
- p << " indexing_maps = [";
- llvm::interleaveComma(getIndexingMaps(), p,
- [&](Attribute attr) { p.printAttribute(attr); });
- p << "]";
- }
+ if (!llvm::equal(getIndexingMaps(), indexingMaps))
+ p << " indexing_maps = " << llvm::interleaved_array(getIndexingMaps());
printNamedStructuredOp(p, getOperation(), getInputs(), getOutputs(),
elidedAttrs);
``````````
</details>
https://github.com/llvm/llvm-project/pull/136330
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