[Mlir-commits] [mlir] [mlir][linalg][NFC] Update elementwise docs to match op name (PR #135999)

[Adam Siemieniuk]

https://github.com/adam-smnk created https://github.com/llvm/llvm-project/pull/135999

Updates linalg.elementwise op description to replace older abbreviated mnemonic with its current form.

>From ca3680e85ecd36191fcdd3566180cf90aa247783 Mon Sep 17 00:00:00 2001
From: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: Wed, 16 Apr 2025 18:31:04 +0200
Subject: [PATCH] [mlir][linalg][NFC] Update elementwise docs to match op name

Updates linalg.elementwise op description to replace older abbreviated
mnemonic with its current form.
---
 .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td    | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
index 308e39a9a51e1..b9edcc92e81a9 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
@@ -565,18 +565,18 @@ def ElementwiseOp : LinalgStructuredBase_Op<"elementwise", [
 
     Example:
 
-    Defining a unary linalg.elemwise with default indexing-map:
+    Defining a unary linalg.elementwise with default indexing-map:
     ```mlir
-    %exp = linalg.elemwise
-        kind=#linalg.elemwise_kind<exp>
+    %exp = linalg.elementwise
+        kind=#linalg.elementwise_kind<exp>
         ins(%x : tensor<4x16x8xf32>)
         outs(%y: tensor<4x16x8xf32>) -> tensor<4x16x8xf32>
     ```
 
-    Defining a binary linalg.elemwise with user-defined indexing-map:
+    Defining a binary linalg.elementwise with user-defined indexing-map:
     ```mlir
-    %add = linalg.elemwise
-        kind=#linalg.elemwise_kind<add>
+    %add = linalg.elementwise
+        kind=#linalg.elementwise_kind<add>
         indexing_maps = [#transpose, #broadcast, #identity]
         ins(%exp, %arg1 : tensor<4x16x8xf32>, tensor<4x16xf32>)
         outs(%arg2: tensor<4x8x16xf32>) -> tensor<4x8x16xf32>