[Mlir-commits] [mlir] [AMDGPU] Implement gpu.subgroup_reduce with DPP intrinsics on AMD GPUs (PR #133204)

[Krzysztof Drewniak]

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@@ -246,6 +267,8 @@ gpu.module @kernels {
 
   // CHECK-SHFL-LABEL: gpu.func @kernel5_clustered(
   // CHECK-SHFL-SAME:    %[[ARG0:.+]]: i16)
+  // CHECK-DPP-LABEL: gpu.func @kernel5_clustered
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krzysz00 wrote:

(unless we come up with ways to use DPP for those cases)

https://github.com/llvm/llvm-project/pull/133204