[Mlir-commits] [mlir] [MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to `svdupq_lane` (PR #135633)
Momchil Velikov
llvmlistbot at llvm.org
Tue Apr 15 05:57:42 PDT 2025
================
@@ -509,6 +524,42 @@ def ScalableMaskedUDivIOp : ScalableMaskedIOp<"masked.divi_unsigned",
def ScalableMaskedDivFOp : ScalableMaskedFOp<"masked.divf", "division">;
+def DupQLaneOp : ArmSVE_Op<"dupq_lane", [Pure, AllTypesMatch<["src", "dst"]>]> {
+ let summary = "Broadcast indexed 128-bit segment to vector";
+
+ let description = [{
+ This operation fills each 128-bit segment of a vector with the elements
+ from the indexed 128-bit segment of the source vector. If the VL is
+ 128 bits the operation is a NOP. If the index exceeds the number of
+ 128-bit segments in a vector the result is an all-zeroes vector.
----------------
momchil-velikov wrote:
Done. I added a link to the intrinsic definition as it does not always lower to a single instructions.
https://github.com/llvm/llvm-project/pull/135633
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