[Mlir-commits] [mlir] [MLIR][LLVM] Support for indirectbr (PR #135092)

[Bruno Cardoso Lopes]

================
@@ -1705,6 +1705,65 @@ def LLVM_BlockTagOp : LLVM_Op<"blocktag"> {
   let hasVerifier = 0;
 }
 
+//===----------------------------------------------------------------------===//
+// IndirectBrOp
+//===----------------------------------------------------------------------===//
+
+def LLVM_IndirectBrOp : LLVM_TerminatorOp<"indirectbr",
+    [SameVariadicOperandSize, DeclareOpInterfaceMethods<BranchOpInterface>,
+     Pure]> {
+  let description = [{
+    Transfer control flow to address in `$addr`. A list of possible target
+    blocks in `$successors` can be provided and maybe used as a hint in LLVM:
----------------
bcardosolopes wrote:

> That would require some kind of interface on the block terminator op

This seems like the best long term solution IMO. In case we end up hitting this use case in our codebase I might have to work on that soonish, let's see!

> So given that the problematic case is ub we can maybe just live with an additional verifier and a comment that running region simplify is dangerous in the presence of indirect branch?

Done.

> What happens in the export to LLVM IR if a blocktag got deleted?

The BlockAddressOp verifier checks the matching blocktag exists, so right now you can't write code like that (well, now that I disallowed those to be present in unrecheable blocks).

https://github.com/llvm/llvm-project/pull/135092