[Mlir-commits] [mlir] [MLIR][XeGPU] Switch to 1D representation for SIMT code (PR #135116)
Charitha Saumya
llvmlistbot at llvm.org
Fri Apr 11 10:10:56 PDT 2025
================
@@ -520,14 +546,41 @@ LogicalResult LoadGatherOp::verify() {
if (tdescShape[0] != maskShape[0])
return emitOpError("dim-0 of the Mask and TensorDesc should be the same.");
+ auto chunkSize = tdescTy.getChunkSize();
+ // for SIMT code, the value should be 1D vector with size of chunkSize.
+ if (valueTy.getRank() == 1 && valueTy.getNumElements() != tdescShape[0]) {
----------------
charithaintc wrote:
why is `valueTy.getNumElements() != tdescShape[0]` ?
Example:
```
%3 = xegpu.load %2, %1 <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose}> : !xegpu.tensor_desc<8x8xf16, #xegpu.scatter_tdesc_attr<chunk_size = 8>, #xegpu.layout<lane_layout = [8, 1], lane_data = [1, 2]>>, vector<4xi1> -> vector<8xf16>
```
https://github.com/llvm/llvm-project/pull/135116
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