[Mlir-commits] [mlir] [MLIR][XeGPU] Update SIMT output representation from 2D vector to 1D vector. (PR #135116)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Wed Apr 9 19:17:39 PDT 2025


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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You can test this locally with the following command:
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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp b/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
index 8ab6463e0..39b726456 100644
--- a/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
+++ b/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
@@ -689,8 +689,8 @@ LogicalResult DpasOp::verify() {
       return emitOpError("Expecting the acc type to be the same as result.");
   }
 
-  //SIMT code: skip the check since lack of semantic info at this level.
-  // Users need to ensure the correctness.
+  // SIMT code: skip the check since lack of semantic info at this level.
+  //  Users need to ensure the correctness.
   if (lhsRank == 1 && rhsRank == 1 && resRank == 1) {
     return success();
   } else { // SIMD code

``````````

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https://github.com/llvm/llvm-project/pull/135116


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