[Mlir-commits] [mlir] [MLIR] Ensure deterministic parallel verification (PR #134963)
Nachi G
llvmlistbot at llvm.org
Wed Apr 9 15:25:45 PDT 2025
================
@@ -220,10 +220,15 @@ LogicalResult OperationVerifier::verifyOnExit(Operation &op) {
o.hasTrait<OpTrait::IsIsolatedFromAbove>())
opsWithIsolatedRegions.push_back(&o);
}
- if (failed(failableParallelForEach(
- op.getContext(), opsWithIsolatedRegions,
- [&](Operation *o) { return verifyOpAndDominance(*o); })))
+
+ std::atomic<bool> opFailedVerify = false;
+ parallelForEach(op.getContext(), opsWithIsolatedRegions, [&](Operation *o) {
+ if (failed(verifyOpAndDominance(*o)))
+ opFailedVerify.store(true, std::memory_order_relaxed);
+ });
+ if (opFailedVerify.load(std::memory_order_relaxed))
----------------
nacgarg wrote:
I don't think it really matters. Technically we only need atomicity here, so by specifying `memory_order_relaxed` we don't impose any additional ordering constraints (like the default `memory_order_seq_cst` would).
https://github.com/llvm/llvm-project/pull/134963
More information about the Mlir-commits
mailing list