[Mlir-commits] [mlir] 84cb08e - [MLIR][AMDGPU] Bump to COV6 (#133849)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Wed Apr 2 09:14:27 PDT 2025
Author: Shilei Tian
Date: 2025-04-02T12:14:24-04:00
New Revision: 84cb08e11866dda721e9a1b5a39c4e963fc36c32
URL: https://github.com/llvm/llvm-project/commit/84cb08e11866dda721e9a1b5a39c4e963fc36c32
DIFF: https://github.com/llvm/llvm-project/commit/84cb08e11866dda721e9a1b5a39c4e963fc36c32.diff
LOG: [MLIR][AMDGPU] Bump to COV6 (#133849)
We already bump to COV6 by default in the front-end and backend. This PR
is for MLIR.
Note that COV6 requires ROCm 6.3+.
Added:
Modified:
mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
mlir/lib/Target/LLVM/ROCDL/Target.cpp
mlir/test/Dialect/LLVMIR/rocdl.mlir
mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td b/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
index 03b1272095d64..3766eb16e9429 100644
--- a/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
@@ -186,7 +186,7 @@ def GpuROCDLAttachTarget: Pass<"rocdl-attach-target", ""> {
/*default=*/"\"\"",
"Target features.">,
Option<"abiVersion", "abi", "std::string",
- /*default=*/"\"500\"",
+ /*default=*/"\"600\"",
"ABI version.">,
Option<"optLevel", "O", "unsigned",
/*default=*/"2",
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index 8945466f5ef5b..900155c274b4d 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -680,7 +680,7 @@ def ROCDL_V2BF16Type : FixedVectorOfLengthAndType<[2], [BF16]>,
BuildableType<"::mlir::VectorType::get("
"{2},$_builder.getBF16Type())">;
-// TODO: The word and byte selectors are immarg in LLVM
+// TODO: The word and byte selectors are immarg in LLVM
// update to be attributes in MLIR
//===---------------------------------------------------------------------===//
// 16-bit float intrinsics
@@ -1129,7 +1129,7 @@ def ROCDL_TargetAttr :
StringRefParameter<"Target chip features.", "\"\"">:$features,
// Also update the default builder below and rocdl-attach-target in
// Dialect/GPU/Transforms/Passes.td .
- StringRefParameter<"ABI version.", "\"500\"">:$abi,
+ StringRefParameter<"ABI version.", "\"600\"">:$abi,
OptionalParameter<"DictionaryAttr", "Target specific flags.">:$flags,
OptionalParameter<"ArrayAttr", "Files to link to the LLVM module.">:$link
);
@@ -1141,7 +1141,7 @@ def ROCDL_TargetAttr :
CArg<"StringRef", "\"amdgcn-amd-amdhsa\"">:$triple,
CArg<"StringRef", "\"gfx900\"">:$chip,
CArg<"StringRef", "\"\"">:$features,
- CArg<"StringRef", "\"500\"">:$abiVersion,
+ CArg<"StringRef", "\"600\"">:$abiVersion,
CArg<"DictionaryAttr", "nullptr">:$targetFlags,
CArg<"ArrayAttr", "nullptr">:$linkFiles), [{
return Base::get($_ctxt, optLevel, triple, chip, features, abiVersion,
diff --git a/mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
index 0c9c61fad1363..9671afd52fa77 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
@@ -234,8 +234,8 @@ ROCDLTargetAttr::verify(function_ref<InFlightDiagnostic()> emitError,
emitError() << "The target chip cannot be empty.";
return failure();
}
- if (abiVersion != "400" && abiVersion != "500") {
- emitError() << "Invalid ABI version, it must be either `400` or `500`.";
+ if (abiVersion != "400" && abiVersion != "500" && abiVersion != "600") {
+ emitError() << "Invalid ABI version, it must be `400`, `500` or '600'.";
return failure();
}
if (files && !llvm::all_of(files, [](::mlir::Attribute attr) {
diff --git a/mlir/lib/Target/LLVM/ROCDL/Target.cpp b/mlir/lib/Target/LLVM/ROCDL/Target.cpp
index cd7a67e58d612..fc839e6674df8 100644
--- a/mlir/lib/Target/LLVM/ROCDL/Target.cpp
+++ b/mlir/lib/Target/LLVM/ROCDL/Target.cpp
@@ -248,7 +248,8 @@ void SerializeGPUModuleBase::addControlVariables(
controlVariable->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Local);
};
- int abi = 500;
+ // Note that COV6 requires ROCm 6.3+.
+ int abi = 600;
abiVer.getAsInteger(0, abi);
module.addModuleFlag(llvm::Module::Error, "amdhsa_code_object_version", abi);
// Return if no device libraries are required.
diff --git a/mlir/test/Dialect/LLVMIR/rocdl.mlir b/mlir/test/Dialect/LLVMIR/rocdl.mlir
index cce2c0aee62f3..828fd58544597 100644
--- a/mlir/test/Dialect/LLVMIR/rocdl.mlir
+++ b/mlir/test/Dialect/LLVMIR/rocdl.mlir
@@ -765,8 +765,8 @@ llvm.func @rocdl_8bit_floats(%source: i32, %source_half: f16, %source_bfloat: bf
// CHECK: rocdl.cvt.f32.fp8
// CHECK: rocdl.cvt.scalef32.f32.bf8
// CHECK: rocdl.cvt.scalef32.f32.fp8
-// CHECK: rocdl.cvt.scalef32.pk.f16.bf8
-// CHECK: rocdl.cvt.scalef32.pk.f16.fp8
+// CHECK: rocdl.cvt.scalef32.pk.f16.bf8
+// CHECK: rocdl.cvt.scalef32.pk.f16.fp8
// CHECK: rocdl.cvt.scalef32.pk.bf16.bf8
// CHECK: rocdl.cvt.scalef32.pk.bf16.fp8
// CHECK: rocdl.cvt.scalef32.f16.fp8
@@ -900,3 +900,6 @@ gpu.module @module_1 [#rocdl.target<O = 1, chip = "gfx900", abi = "500", link =
gpu.module @module_2 [#rocdl.target<chip = "gfx900">, #rocdl.target<chip = "gfx90a">] {
}
+
+gpu.module @module_3 [#rocdl.target<O = 1, chip = "gfx900", abi = "600", link = ["my_device_lib.bc"], flags = {fast, daz, unsafe_math}>] {
+}
diff --git a/mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp b/mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
index d5e72a1713174..a015e1d7dde62 100644
--- a/mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
+++ b/mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
@@ -125,7 +125,7 @@ TEST_F(MLIRTargetLLVMROCDL,
serializer.serializeToObject(gpuModule, options);
// Check that the serializer was successful.
EXPECT_TRUE(StringRef(object->data(), object->size())
- .contains(".amdhsa_code_object_version 5"));
+ .contains(".amdhsa_code_object_version 6"));
}
}
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