[Mlir-commits] [mlir] [mlir][gpu] Add address space modifier to Barrier (PR #110527)
Jakub Kuderski
llvmlistbot at llvm.org
Mon Sep 30 10:46:25 PDT 2024
================
@@ -1371,11 +1372,25 @@ def GPU_BarrierOp : GPU_Op<"barrier"> {
accessing the same memory can be avoided by synchronizing work items
in-between these accesses.
+ The address space of visible memory accesses can be modified by adding a
+ list of address spaces required to be visible. By default all address spaces
+ are included.
----------------
kuhar wrote:
> I'm not trying to say that the memory is visible, but that the memory accesses are visible.
I don't know what this means either. I don't want to be pedantic here, but this is just not the wording I'm used to / have seen in this context. I did some searching and found this thread that talks about something adjacent: memory access availability vs. visibility https://community.khronos.org/t/difference-between-availability-and-visibility/7401/2.
> I'm open to suggestions on how to make it more clear.
Maybe something like this (I reworded a few places):
```
The "barrier" op synchronizes all work items of a workgroup. It is used
to coordinate communication between the work items of the workgroup.
`gpu.barrier` waits until all work items in the workgroup have reached this point
and all memory accesses made by these work items prior to the op have
completed and are visible to all work items in the workgroup.
Data races between work items accessing the same memory locations can
be avoided by synchronizing work items in-between these accesses.
By default, all address spaces are included in `gpu.barrier`. This is equivalent to:
```mlir
gpu.barrier memfence [#gpu.address_space<global>,
#gpu.address_space<workgroup>,
#gpu.address_space<private>]
```
The `memfence` argument weakens the synchronization requrements such that
only the listed address spaces need to have their accesses completed and visible across the
workgroup.
```
https://github.com/llvm/llvm-project/pull/110527
More information about the Mlir-commits
mailing list