[Mlir-commits] [mlir] [mlir][gpu] Add address space modifier to Barrier (PR #110527)
Krzysztof Drewniak
llvmlistbot at llvm.org
Mon Sep 30 09:25:59 PDT 2024
================
@@ -1371,11 +1372,25 @@ def GPU_BarrierOp : GPU_Op<"barrier"> {
accessing the same memory can be avoided by synchronizing work items
in-between these accesses.
+ The address space of visible memory accesses can be modified by adding a
+ list of address spaces required to be visible. By default all address spaces
+ are included.
----------------
krzysz00 wrote:
`gpu.barrier` is stronger than `amdgpu.lds_barrier`. The current semantics of `gpu.barrier` are not AMD's `s_barrier`, they're `(atomic fence) + s_barrier`.
(I think there are are even explicit calls to LLVM memory fencing in the AMD lowering path for `gpu.barrier`).
That is, `gpu.barrier` imposes a happens-before over all GPU memory by default, and this patch lets people loosen that.
https://github.com/llvm/llvm-project/pull/110527
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