[Mlir-commits] [mlir] [mlir][AMDGPU] Add a scheduling barrier guard around inlineAsm lds.barrier (PR #109678)

[Matt Arsenault]

arsenm wrote:

> Compilation fails while it works for pass.ll:

This is just a bug, and this patch in no way works around it. This may be hidden or exposed by just about any code perturbation 

> 
> ```
> llc: /home/danherna/mlir-dev/rocMLIR/external/llvm-project/llvm/lib/CodeGen/SplitKit.cpp:1661: void llvm::SplitEditor::splitLiveThroughBlock(unsigned int, unsigned int, SlotIndex, unsigned int, SlotIndex): Assertion `(!LeaveBefore || Idx <= LeaveBefore) && "Interference"' failed.

This is #109294, but this test case is much simpler than the current one. I'll see if this one reduces any better 

https://github.com/llvm/llvm-project/pull/109678