[Mlir-commits] [mlir] [mlir][linalg] Vectorization support for convolution of i1 type (PR #109480)

[Nirvedh Meshram]

================
@@ -3627,6 +3635,7 @@ struct Conv1DGenerator
   int strideW, dilationW;
   Value lhsShaped, rhsShaped, resShaped;
   ShapedType lhsShapedType, rhsShapedType, resShapedType;
+  std::optional<vector::CombiningKind> maybeKind;
----------------
nirvedhmeshram wrote:

The reason we need it is that, we were relying on default that the combiningKind is always `ADD` but due to strength reduction it is `OR` for i1 type.

https://github.com/llvm/llvm-project/pull/109480