[Mlir-commits] [mlir] [mlir][vector][nfc] Update vector load/store doc wrt unit strides. (PR #109267)

[Ivan Butygin]

https://github.com/Hardcode84 updated https://github.com/llvm/llvm-project/pull/109267

>From 091526bb43db9234d7d3cd09c0408ef558a80424 Mon Sep 17 00:00:00 2001
From: Ivan Butygin <ivan.butygin at gmail.com>
Date: Thu, 19 Sep 2024 12:35:19 +0200
Subject: [PATCH 1/3] [mlir][vector] Update vector load/store doc wrt unit
 strides.

Follow up to https://github.com/llvm/llvm-project/pull/108998.

Non-contigious strides are allowed for 1-slement vector load/stores.
---
 mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
index b96f5c2651bce5..65ed9b9d3df927 100644
--- a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
+++ b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
@@ -1655,6 +1655,7 @@ def Vector_LoadOp : Vector_Op<"load"> {
     strides. Only unit strides are allowed along the most minor memref
     dimension. These constraints guarantee that elements read along the first
     dimension of the slice are contiguous in memory.
+    Non-unit strides are allowed when doing 0-rank or 1-element vector load.
 
     The memref element type can be a scalar or a vector type. If the memref
     element type is a scalar, it should match the element type of the result
@@ -1739,6 +1740,7 @@ def Vector_StoreOp : Vector_Op<"store"> {
     strided by the memref strides. Only unit strides are allowed along the most
     minor memref dimension. These constraints guarantee that elements written
     along the first dimension of the slice are contiguous in memory.
+    Non-unit strides are allowed when doing 0-rank or 1-element vector store.
 
     The memref element type can be a scalar or a vector type. If the memref
     element type is a scalar, it should match the element type of the value

>From e47ffead17956fa309559ecb7d0ceaf4f9e3fb0d Mon Sep 17 00:00:00 2001
From: Ivan Butygin <ivan.butygin at gmail.com>
Date: Thu, 19 Sep 2024 13:15:44 +0200
Subject: [PATCH 2/3] update doc

---
 mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
index 65ed9b9d3df927..448246f08fcde2 100644
--- a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
+++ b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
@@ -1652,10 +1652,10 @@ def Vector_LoadOp : Vector_Op<"load"> {
     based on the element type of the memref. The shape of the result vector
     type determines the shape of the slice read from the start memory address.
     The elements along each dimension of the slice are strided by the memref
-    strides. Only unit strides are allowed along the most minor memref
-    dimension. These constraints guarantee that elements read along the first
-    dimension of the slice are contiguous in memory.
-    Non-unit strides are allowed when doing 0-rank or 1-element vector load.
+    strides. When loading more than 1 element, only unit strides are allowed
+    along the most minor memref dimension. These constraints guarantee that
+    elements read along the first dimension of the slice are contiguous in
+    memory.
 
     The memref element type can be a scalar or a vector type. If the memref
     element type is a scalar, it should match the element type of the result
@@ -1737,10 +1737,10 @@ def Vector_StoreOp : Vector_Op<"store"> {
     memref dimension based on the element type of the memref. The shape of the
     vector value to store determines the shape of the slice written from the
     start memory address. The elements along each dimension of the slice are
-    strided by the memref strides. Only unit strides are allowed along the most
-    minor memref dimension. These constraints guarantee that elements written
-    along the first dimension of the slice are contiguous in memory.
-    Non-unit strides are allowed when doing 0-rank or 1-element vector store.
+    strided by the memref strides. When storing more than 1 element, only unit
+    strides are allowed along the most minor memref dimension. These constraints
+    guarantee that elements read along the first dimension of the slice are
+    contiguous in memory.
 
     The memref element type can be a scalar or a vector type. If the memref
     element type is a scalar, it should match the element type of the value

>From eb387e68a6c88d4fad3b6e2866035bdba3bc6713 Mon Sep 17 00:00:00 2001
From: Ivan Butygin <ivan.butygin at gmail.com>
Date: Thu, 19 Sep 2024 13:17:29 +0200
Subject: [PATCH 3/3] fix doc

---
 mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
index 448246f08fcde2..b6d2cc29cd1bf8 100644
--- a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
+++ b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
@@ -1739,7 +1739,7 @@ def Vector_StoreOp : Vector_Op<"store"> {
     start memory address. The elements along each dimension of the slice are
     strided by the memref strides. When storing more than 1 element, only unit
     strides are allowed along the most minor memref dimension. These constraints
-    guarantee that elements read along the first dimension of the slice are
+    guarantee that elements written along the first dimension of the slice are
     contiguous in memory.
 
     The memref element type can be a scalar or a vector type. If the memref