[Mlir-commits] [mlir] [mlir][vector] Update vector load/store doc wrt unit strides. (PR #109267)

[llvmlistbot at llvm.org]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-mlir

Author: Ivan Butygin (Hardcode84)

<details>
<summary>Changes</summary>

Follow up to https://github.com/llvm/llvm-project/pull/108998.

Non-contiguous strides are allowed now for 1-element vector load/stores.

---
Full diff: https://github.com/llvm/llvm-project/pull/109267.diff


1 Files Affected:

- (modified) mlir/include/mlir/Dialect/Vector/IR/VectorOps.td (+2) 


``````````diff
diff --git a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
index b96f5c2651bce5..65ed9b9d3df927 100644
--- a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
+++ b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
@@ -1655,6 +1655,7 @@ def Vector_LoadOp : Vector_Op<"load"> {
     strides. Only unit strides are allowed along the most minor memref
     dimension. These constraints guarantee that elements read along the first
     dimension of the slice are contiguous in memory.
+    Non-unit strides are allowed when doing 0-rank or 1-element vector load.
 
     The memref element type can be a scalar or a vector type. If the memref
     element type is a scalar, it should match the element type of the result
@@ -1739,6 +1740,7 @@ def Vector_StoreOp : Vector_Op<"store"> {
     strided by the memref strides. Only unit strides are allowed along the most
     minor memref dimension. These constraints guarantee that elements written
     along the first dimension of the slice are contiguous in memory.
+    Non-unit strides are allowed when doing 0-rank or 1-element vector store.
 
     The memref element type can be a scalar or a vector type. If the memref
     element type is a scalar, it should match the element type of the value

``````````

</details>


https://github.com/llvm/llvm-project/pull/109267