[Mlir-commits] [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)

Nirvedh Meshram llvmlistbot at llvm.org
Thu Sep 12 08:50:26 PDT 2024


================
@@ -332,7 +334,13 @@ void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
   target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::Exp2Op, LLVM::FCeilOp,
                       LLVM::FFloorOp, LLVM::FRemOp, LLVM::LogOp, LLVM::Log10Op,
                       LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp>();
-
+  // These ops are not legal for f64 type but are legal for narrower float
+  // types.
+  target.addDynamicallyLegalOp<LLVM::ExpOp, LLVM::LogOp>([](Operation *op) {
+    return any_of(op->getOperandTypes(), [](Type type) {
+      return isa<FloatType>(type) && type.getIntOrFloatBitWidth() < 64;
----------------
nirvedhmeshram wrote:

looks like bfloat16 is also supported? https://github.com/llvm/llvm-project/pull/108409

https://github.com/llvm/llvm-project/pull/108302


More information about the Mlir-commits mailing list