[Mlir-commits] [mlir] 8aeb104 - [mlir][SME] Update E2E test to show optional loop optimisation (NFC) (#107585)

[llvmlistbot at llvm.org]

Author: Hugo Trachino
Date: 2024-09-10T09:25:01+01:00
New Revision: 8aeb104ce4d0907f2f1f5286611d6c2202d4ce53

URL: https://github.com/llvm/llvm-project/commit/8aeb104ce4d0907f2f1f5286611d6c2202d4ce53
DIFF: https://github.com/llvm/llvm-project/commit/8aeb104ce4d0907f2f1f5286611d6c2202d4ce53.diff

LOG: [mlir][SME] Update E2E test to show optional loop optimisation (NFC) (#107585)

Introduces loop hoisting to ARM SME E2E tests to allow the hoisting of
the tile load offering very important speedup.

Discussed here :
https://discourse.llvm.org/t/mlir-for-arm-sme-reducing-tile-data-transfers/80065/2

Added: 
    

Modified: 
    mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
    mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
index a57348a543c3cf..06a6e2279b6a75 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
@@ -82,8 +82,16 @@ module attributes {transform.with_named_sequence} {
     transform.apply_patterns to %func {
       transform.apply_patterns.vector.lower_contraction lowering_strategy = "outerproduct"
       transform.apply_patterns.vector.lower_masks
+      transform.apply_patterns.canonicalization
     } : !transform.any_op
 
+    // Step 5 (optional optimization): Hoist accumulator load/store.
+    %func_h = transform.structured.hoist_redundant_vector_transfers %func
+        : (!transform.any_op) -> !transform.any_op
+    %all_loops = transform.structured.match interface{LoopLikeInterface} in %module
+      : (!transform.any_op) -> !transform.any_op
+    transform.apply_licm to %all_loops : !transform.any_op
+    transform.loop.hoist_loop_invariant_subsets %all_loops : !transform.any_op
     transform.yield
   }
 }

diff  --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
index 79c9fcac70604b..29b0bc0c196061 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
@@ -88,8 +88,16 @@ module attributes {transform.with_named_sequence} {
       transform.apply_patterns.vector.lower_contraction lowering_strategy = "outerproduct"
       transform.apply_patterns.vector.lower_masks
       transform.apply_patterns.vector.rank_reducing_subview_patterns
+      transform.apply_patterns.canonicalization
     } : !transform.any_op
 
+    // Step 6 (optional optimization): Hoist accumulator load/store.
+    %func_h = transform.structured.hoist_redundant_vector_transfers %func
+        : (!transform.any_op) -> !transform.any_op
+    %all_loops = transform.structured.match interface{LoopLikeInterface} in %bufferize
+      : (!transform.any_op) -> !transform.any_op
+    transform.apply_licm to %all_loops : !transform.any_op
+    transform.loop.hoist_loop_invariant_subsets %all_loops : !transform.any_op
     transform.yield
   }
 }