[Mlir-commits] [mlir] [MLIR] Use APFloat semantics to get floating type width (PR #107372)

[Sergey Kozub]

https://github.com/sergey-kozub updated https://github.com/llvm/llvm-project/pull/107372

>From bb4556d6874426e8dd73576cae8676e58deb492a Mon Sep 17 00:00:00 2001
From: Sergey Kozub <skozub at nvidia.com>
Date: Thu, 5 Sep 2024 11:25:57 +0200
Subject: [PATCH] [MLIR] Use APFloat semantics to get floating type width

---
 mlir/lib/IR/BuiltinTypes.cpp | 19 +++++--------------
 1 file changed, 5 insertions(+), 14 deletions(-)

diff --git a/mlir/lib/IR/BuiltinTypes.cpp b/mlir/lib/IR/BuiltinTypes.cpp
index 16b53efa55fb80..dfe3658eddfcec 100644
--- a/mlir/lib/IR/BuiltinTypes.cpp
+++ b/mlir/lib/IR/BuiltinTypes.cpp
@@ -91,21 +91,12 @@ IntegerType IntegerType::scaleElementBitwidth(unsigned scale) {
 //===----------------------------------------------------------------------===//
 
 unsigned FloatType::getWidth() {
-  if (llvm::isa<Float8E5M2Type, Float8E4M3Type, Float8E4M3FNType,
-                Float8E5M2FNUZType, Float8E4M3FNUZType, Float8E4M3B11FNUZType,
-                Float8E3M4Type>(*this))
-    return 8;
-  if (llvm::isa<Float16Type, BFloat16Type>(*this))
-    return 16;
-  if (llvm::isa<Float32Type, FloatTF32Type>(*this))
+  // The actual width of TF32 is 19 bits. However, since it is a truncated
+  // version of Float32, we treat it as 32 bits in MLIR FloatType::getWidth
+  // for compatibility.
+  if (llvm::isa<FloatTF32Type>(*this))
     return 32;
-  if (llvm::isa<Float64Type>(*this))
-    return 64;
-  if (llvm::isa<Float80Type>(*this))
-    return 80;
-  if (llvm::isa<Float128Type>(*this))
-    return 128;
-  llvm_unreachable("unexpected float type");
+  return APFloat::semanticsSizeInBits(getFloatSemantics());
 }
 
 /// Returns the floating semantics for the given type.