[Mlir-commits] [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)

[llvmlistbot at llvm.org]

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@@ -41,6 +41,8 @@ bool isIdempotentRMW(AtomicRMWInst& RMWI) {
     case AtomicRMWInst::Sub:
     case AtomicRMWInst::Or:
     case AtomicRMWInst::Xor:
+    case AtomicRMWInst::USubCond:
+    case AtomicRMWInst::USubSat:
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anjenner wrote:

I've removed this piece for now. I'm happy to add it back with a separate change, but it looks from the tests like we don't actually want to use idempotency optimizations with atomicrmw operations at all so maybe nothing needs to be done here.

https://github.com/llvm/llvm-project/pull/105568