[Mlir-commits] [mlir] [mlir][vector] Refactor vector-transfer-to-vector-load-store.mlir (NFC) (PR #105509)

[Hugo Trachino]

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@@ -330,54 +330,62 @@ func.func @transfer_read_permutations(%arg0 : memref<?x?xf32>, %arg1 : memref<?x
          vector<7x14x8x16xf32>, vector<8xf32>
 }
 
-// CHECK-LABEL: func @transfer_write_permutations
-// CHECK-SAME:      %[[ARG0:.*]]: memref<?x?x?x?xf32>
-// CHECK-SAME:      %[[ARG1:.*]]: tensor<?x?x?x?xf32>
-// CHECK-SAME:      %[[ARG2:.*]]: vector<7x14x8x16xf32>
-// CHECK-SAME:      %[[ARG3:.*]]: vector<8x16xf32>
-// CHECK-SAME:      %[[M:.*]]: i1
-func.func @transfer_write_permutations(
-    %arg0 : memref<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?xf32>,
-    %v1 : vector<7x14x8x16xf32>, %v2 : vector<8x16xf32>, %m: i1) -> tensor<?x?x?x?xf32> {
+// CHECK-LABEL: func @transfer_write_permutations_tensor
+// CHECK-SAME:    %[[SRC:.*]]: tensor<?x?x?x?xf32>
+// CHECK-SAME:    %[[VEC:.*]]: vector<7x14x8x16xf32>
+// CHECK-SAME:    %[[M:.*]]: i1
+func.func @transfer_write_permutations_tensor(
+    %src : tensor<?x?x?x?xf32>,
+    %vec : vector<7x14x8x16xf32>, %m: i1) -> tensor<?x?x?x?xf32> {
   // CHECK-DAG: %[[C0:.*]] = arith.constant 0 : index
   %c0 = arith.constant 0 : index
 
   // CHECK: %[[MASK:.*]] = vector.splat %[[M]] : vector<16x14x7x8xi1>
   %mask0 = vector.splat %m : vector<16x14x7x8xi1>
-  %0 = vector.transfer_write %v1, %arg1[%c0, %c0, %c0, %c0], %mask0 {in_bounds = [true, false, false, true], permutation_map = affine_map<(d0, d1, d2, d3) -> (d2, d1, d3, d0)>} : vector<7x14x8x16xf32>, tensor<?x?x?x?xf32>
+  %res = vector.transfer_write %vec, %src[%c0, %c0, %c0, %c0], %mask0 {in_bounds = [true, false, false, true], permutation_map = affine_map<(d0, d1, d2, d3) -> (d2, d1, d3, d0)>} : vector<7x14x8x16xf32>, tensor<?x?x?x?xf32>
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nujaa wrote:

The tensor case is masked but not the memref, would that make sense to test both with and without masking ?

https://github.com/llvm/llvm-project/pull/105509