[Mlir-commits] [mlir] Move tblgen v2 (PR #113781)
Maksim Levental
llvmlistbot at llvm.org
Sat Oct 26 20:05:56 PDT 2024
https://github.com/makslevental updated https://github.com/llvm/llvm-project/pull/113781
>From 9944fd2a516c49370a91bcc72b98ffd493c1a3b3 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 16:36:46 -0400
Subject: [PATCH 01/24] blindly move stuff
---
.../mlir/TableGen}/AttrOrTypeFormatGen.h | 0
.../mlir/TableGen}/DialectGenUtilities.h | 0
.../mlir/TableGen}/DocGenUtilities.h | 0
.../mlir/TableGen}/FormatGen.h | 0
.../mlir/TableGen}/OpClass.h | 0
.../mlir/TableGen}/OpFormatGen.h | 0
.../mlir/TableGen}/OpGenHelpers.h | 0
.../TableGen}/AttrOrTypeDefGen.cpp | 0
.../TableGen}/AttrOrTypeFormatGen.cpp | 0
.../TableGen}/BytecodeDialectGen.cpp | 0
mlir/lib/TableGen/CMakeLists.txt | 25 +++++++++++++++++-
.../TableGen}/DialectGen.cpp | 0
.../TableGen}/DirectiveCommonGen.cpp | 0
.../TableGen}/EnumPythonBindingGen.cpp | 0
.../mlir-tblgen => lib/TableGen}/EnumsGen.cpp | 0
.../TableGen}/FormatGen.cpp | 0
.../TableGen}/LLVMIRConversionGen.cpp | 0
.../TableGen}/LLVMIRIntrinsicGen.cpp | 0
.../mlir-tblgen => lib/TableGen}/OmpOpGen.cpp | 0
.../mlir-tblgen => lib/TableGen}/OpClass.cpp | 0
.../TableGen}/OpDefinitionsGen.cpp | 0
.../mlir-tblgen => lib/TableGen}/OpDocGen.cpp | 0
.../TableGen}/OpFormatGen.cpp | 0
.../TableGen}/OpGenHelpers.cpp | 0
.../TableGen}/OpInterfacesGen.cpp | 0
.../TableGen}/OpPythonBindingGen.cpp | 0
.../TableGen}/PassCAPIGen.cpp | 0
.../TableGen}/PassDocGen.cpp | 0
.../mlir-tblgen => lib/TableGen}/PassGen.cpp | 0
.../TableGen}/RewriterGen.cpp | 0
.../TableGen}/SPIRVUtilsGen.cpp | 0
mlir/tools/mlir-tblgen/CMakeLists.txt | 26 +------------------
32 files changed, 25 insertions(+), 26 deletions(-)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/AttrOrTypeFormatGen.h (100%)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/DialectGenUtilities.h (100%)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/DocGenUtilities.h (100%)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/FormatGen.h (100%)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/OpClass.h (100%)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/OpFormatGen.h (100%)
rename mlir/{tools/mlir-tblgen => include/mlir/TableGen}/OpGenHelpers.h (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/AttrOrTypeDefGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/AttrOrTypeFormatGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/BytecodeDialectGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/DialectGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/DirectiveCommonGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/EnumPythonBindingGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/EnumsGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/FormatGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/LLVMIRConversionGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/LLVMIRIntrinsicGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OmpOpGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpClass.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpDefinitionsGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpDocGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpFormatGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpGenHelpers.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpInterfacesGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/OpPythonBindingGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/PassCAPIGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/PassDocGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/PassGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/RewriterGen.cpp (100%)
rename mlir/{tools/mlir-tblgen => lib/TableGen}/SPIRVUtilsGen.cpp (100%)
diff --git a/mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.h b/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.h
rename to mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
diff --git a/mlir/tools/mlir-tblgen/DialectGenUtilities.h b/mlir/include/mlir/TableGen/DialectGenUtilities.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/DialectGenUtilities.h
rename to mlir/include/mlir/TableGen/DialectGenUtilities.h
diff --git a/mlir/tools/mlir-tblgen/DocGenUtilities.h b/mlir/include/mlir/TableGen/DocGenUtilities.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/DocGenUtilities.h
rename to mlir/include/mlir/TableGen/DocGenUtilities.h
diff --git a/mlir/tools/mlir-tblgen/FormatGen.h b/mlir/include/mlir/TableGen/FormatGen.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/FormatGen.h
rename to mlir/include/mlir/TableGen/FormatGen.h
diff --git a/mlir/tools/mlir-tblgen/OpClass.h b/mlir/include/mlir/TableGen/OpClass.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpClass.h
rename to mlir/include/mlir/TableGen/OpClass.h
diff --git a/mlir/tools/mlir-tblgen/OpFormatGen.h b/mlir/include/mlir/TableGen/OpFormatGen.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpFormatGen.h
rename to mlir/include/mlir/TableGen/OpFormatGen.h
diff --git a/mlir/tools/mlir-tblgen/OpGenHelpers.h b/mlir/include/mlir/TableGen/OpGenHelpers.h
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpGenHelpers.h
rename to mlir/include/mlir/TableGen/OpGenHelpers.h
diff --git a/mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
rename to mlir/lib/TableGen/AttrOrTypeDefGen.cpp
diff --git a/mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
rename to mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
diff --git a/mlir/tools/mlir-tblgen/BytecodeDialectGen.cpp b/mlir/lib/TableGen/BytecodeDialectGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/BytecodeDialectGen.cpp
rename to mlir/lib/TableGen/BytecodeDialectGen.cpp
diff --git a/mlir/lib/TableGen/CMakeLists.txt b/mlir/lib/TableGen/CMakeLists.txt
index c4104e644147c6..449da8dca46973 100644
--- a/mlir/lib/TableGen/CMakeLists.txt
+++ b/mlir/lib/TableGen/CMakeLists.txt
@@ -13,22 +13,45 @@
# this means that MLIRSupport (outside of header-only access) cannot be used.
llvm_add_library(MLIRTableGen STATIC
Argument.cpp
- Attribute.cpp
AttrOrTypeDef.cpp
+ AttrOrTypeDefGen.cpp
+ AttrOrTypeFormatGen.cpp
+ Attribute.cpp
Builder.cpp
+ BytecodeDialectGen.cpp
Class.cpp
CodeGenHelpers.cpp
Constraint.cpp
Dialect.cpp
+ DialectGen.cpp
+ DirectiveCommonGen.cpp
+ EnumPythonBindingGen.cpp
+ EnumsGen.cpp
Format.cpp
+ FormatGen.cpp
GenInfo.cpp
Interfaces.cpp
+ LLVMIRConversionGen.cpp
+ LLVMIRIntrinsicGen.cpp
+ OmpOpGen.cpp
+ OpClass.cpp
+ OpDefinitionsGen.cpp
+ OpDocGen.cpp
+ OpFormatGen.cpp
+ OpGenHelpers.cpp
+ OpInterfacesGen.cpp
+ OpPythonBindingGen.cpp
Operator.cpp
Pass.cpp
+ PassCAPIGen.cpp
+ PassDocGen.cpp
+ PassGen.cpp
Pattern.cpp
Predicate.cpp
Property.cpp
Region.cpp
+ RewriterGen.cpp
+ SPIRVUtilsGen.cpp
SideEffects.cpp
Successor.cpp
Trait.cpp
diff --git a/mlir/tools/mlir-tblgen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/DialectGen.cpp
rename to mlir/lib/TableGen/DialectGen.cpp
diff --git a/mlir/tools/mlir-tblgen/DirectiveCommonGen.cpp b/mlir/lib/TableGen/DirectiveCommonGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/DirectiveCommonGen.cpp
rename to mlir/lib/TableGen/DirectiveCommonGen.cpp
diff --git a/mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
rename to mlir/lib/TableGen/EnumPythonBindingGen.cpp
diff --git a/mlir/tools/mlir-tblgen/EnumsGen.cpp b/mlir/lib/TableGen/EnumsGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/EnumsGen.cpp
rename to mlir/lib/TableGen/EnumsGen.cpp
diff --git a/mlir/tools/mlir-tblgen/FormatGen.cpp b/mlir/lib/TableGen/FormatGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/FormatGen.cpp
rename to mlir/lib/TableGen/FormatGen.cpp
diff --git a/mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
rename to mlir/lib/TableGen/LLVMIRConversionGen.cpp
diff --git a/mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
rename to mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
diff --git a/mlir/tools/mlir-tblgen/OmpOpGen.cpp b/mlir/lib/TableGen/OmpOpGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OmpOpGen.cpp
rename to mlir/lib/TableGen/OmpOpGen.cpp
diff --git a/mlir/tools/mlir-tblgen/OpClass.cpp b/mlir/lib/TableGen/OpClass.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpClass.cpp
rename to mlir/lib/TableGen/OpClass.cpp
diff --git a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
rename to mlir/lib/TableGen/OpDefinitionsGen.cpp
diff --git a/mlir/tools/mlir-tblgen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpDocGen.cpp
rename to mlir/lib/TableGen/OpDocGen.cpp
diff --git a/mlir/tools/mlir-tblgen/OpFormatGen.cpp b/mlir/lib/TableGen/OpFormatGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpFormatGen.cpp
rename to mlir/lib/TableGen/OpFormatGen.cpp
diff --git a/mlir/tools/mlir-tblgen/OpGenHelpers.cpp b/mlir/lib/TableGen/OpGenHelpers.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpGenHelpers.cpp
rename to mlir/lib/TableGen/OpGenHelpers.cpp
diff --git a/mlir/tools/mlir-tblgen/OpInterfacesGen.cpp b/mlir/lib/TableGen/OpInterfacesGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
rename to mlir/lib/TableGen/OpInterfacesGen.cpp
diff --git a/mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp b/mlir/lib/TableGen/OpPythonBindingGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
rename to mlir/lib/TableGen/OpPythonBindingGen.cpp
diff --git a/mlir/tools/mlir-tblgen/PassCAPIGen.cpp b/mlir/lib/TableGen/PassCAPIGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/PassCAPIGen.cpp
rename to mlir/lib/TableGen/PassCAPIGen.cpp
diff --git a/mlir/tools/mlir-tblgen/PassDocGen.cpp b/mlir/lib/TableGen/PassDocGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/PassDocGen.cpp
rename to mlir/lib/TableGen/PassDocGen.cpp
diff --git a/mlir/tools/mlir-tblgen/PassGen.cpp b/mlir/lib/TableGen/PassGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/PassGen.cpp
rename to mlir/lib/TableGen/PassGen.cpp
diff --git a/mlir/tools/mlir-tblgen/RewriterGen.cpp b/mlir/lib/TableGen/RewriterGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/RewriterGen.cpp
rename to mlir/lib/TableGen/RewriterGen.cpp
diff --git a/mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
similarity index 100%
rename from mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
rename to mlir/lib/TableGen/SPIRVUtilsGen.cpp
diff --git a/mlir/tools/mlir-tblgen/CMakeLists.txt b/mlir/tools/mlir-tblgen/CMakeLists.txt
index fb507dc7f8c3cc..544a95530a22bd 100644
--- a/mlir/tools/mlir-tblgen/CMakeLists.txt
+++ b/mlir/tools/mlir-tblgen/CMakeLists.txt
@@ -8,31 +8,7 @@ set(LLVM_LINK_COMPONENTS
add_tablegen(mlir-tblgen MLIR
DESTINATION "${MLIR_TOOLS_INSTALL_DIR}"
EXPORT MLIR
- AttrOrTypeDefGen.cpp
- AttrOrTypeFormatGen.cpp
- BytecodeDialectGen.cpp
- DialectGen.cpp
- DirectiveCommonGen.cpp
- EnumsGen.cpp
- EnumPythonBindingGen.cpp
- FormatGen.cpp
- LLVMIRConversionGen.cpp
- LLVMIRIntrinsicGen.cpp
- mlir-tblgen.cpp
- OmpOpGen.cpp
- OpClass.cpp
- OpDefinitionsGen.cpp
- OpDocGen.cpp
- OpFormatGen.cpp
- OpGenHelpers.cpp
- OpInterfacesGen.cpp
- OpPythonBindingGen.cpp
- PassCAPIGen.cpp
- PassDocGen.cpp
- PassGen.cpp
- RewriterGen.cpp
- SPIRVUtilsGen.cpp
- )
+ mlir-tblgen.cpp)
target_link_libraries(mlir-tblgen
PRIVATE
>From 07d233d31b00d04272ca8156b4fdcbc9a8ab59cd Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 16:40:58 -0400
Subject: [PATCH 02/24] fix header paths
---
mlir/lib/TableGen/AttrOrTypeDefGen.cpp | 2 +-
mlir/lib/TableGen/AttrOrTypeFormatGen.cpp | 4 ++--
mlir/lib/TableGen/DialectGen.cpp | 2 +-
mlir/lib/TableGen/EnumPythonBindingGen.cpp | 2 +-
mlir/lib/TableGen/EnumsGen.cpp | 2 +-
mlir/lib/TableGen/FormatGen.cpp | 2 +-
mlir/lib/TableGen/OpClass.cpp | 2 +-
mlir/lib/TableGen/OpDefinitionsGen.cpp | 6 +++---
mlir/lib/TableGen/OpDocGen.cpp | 6 +++---
mlir/lib/TableGen/OpFormatGen.cpp | 6 +++---
mlir/lib/TableGen/OpGenHelpers.cpp | 2 +-
mlir/lib/TableGen/OpInterfacesGen.cpp | 2 +-
mlir/lib/TableGen/OpPythonBindingGen.cpp | 2 +-
mlir/lib/TableGen/PassDocGen.cpp | 2 +-
14 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
index 6a39424bd463fd..e71fd8772e4c88 100644
--- a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
-#include "AttrOrTypeFormatGen.h"
+#include "mlir/TableGen/AttrOrTypeFormatGen.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/CodeGenHelpers.h"
diff --git a/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
index a4ae271edb6bd2..a7d61801cbcf96 100644
--- a/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#include "AttrOrTypeFormatGen.h"
-#include "FormatGen.h"
+#include "mlir/TableGen/AttrOrTypeFormatGen.h"
+#include "mlir/TableGen/FormatGen.h"
#include "mlir/Support/LLVM.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Format.h"
diff --git a/mlir/lib/TableGen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
index 414cad5e1dcc2e..1e8ab8f2576e79 100644
--- a/mlir/lib/TableGen/DialectGen.cpp
+++ b/mlir/lib/TableGen/DialectGen.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "DialectGenUtilities.h"
+#include "mlir/TableGen/DialectGenUtilities.h"
#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/CodeGenHelpers.h"
#include "mlir/TableGen/Format.h"
diff --git a/mlir/lib/TableGen/EnumPythonBindingGen.cpp b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
index 3f660ae151c749..e5f13ce4de3b08 100644
--- a/mlir/lib/TableGen/EnumPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
@@ -10,7 +10,7 @@
// generate the corresponding Python binding classes.
//
//===----------------------------------------------------------------------===//
-#include "OpGenHelpers.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Attribute.h"
diff --git a/mlir/lib/TableGen/EnumsGen.cpp b/mlir/lib/TableGen/EnumsGen.cpp
index 47ffd291cae687..f64f1a038950d5 100644
--- a/mlir/lib/TableGen/EnumsGen.cpp
+++ b/mlir/lib/TableGen/EnumsGen.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "FormatGen.h"
+#include "mlir/TableGen/FormatGen.h"
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Format.h"
#include "mlir/TableGen/GenInfo.h"
diff --git a/mlir/lib/TableGen/FormatGen.cpp b/mlir/lib/TableGen/FormatGen.cpp
index d145f3e5a23ddb..63568922a31b36 100644
--- a/mlir/lib/TableGen/FormatGen.cpp
+++ b/mlir/lib/TableGen/FormatGen.cpp
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
-#include "FormatGen.h"
+#include "mlir/TableGen/FormatGen.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/TableGen/Error.h"
diff --git a/mlir/lib/TableGen/OpClass.cpp b/mlir/lib/TableGen/OpClass.cpp
index 60fa1833ce625e..7d4529835cdb4e 100644
--- a/mlir/lib/TableGen/OpClass.cpp
+++ b/mlir/lib/TableGen/OpClass.cpp
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
-#include "OpClass.h"
+#include "mlir/TableGen/OpClass.h"
using namespace mlir;
using namespace mlir::tblgen;
diff --git a/mlir/lib/TableGen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
index 9badb7aa163a60..4ffdfec76c886f 100644
--- a/mlir/lib/TableGen/OpDefinitionsGen.cpp
+++ b/mlir/lib/TableGen/OpDefinitionsGen.cpp
@@ -11,9 +11,9 @@
//
//===----------------------------------------------------------------------===//
-#include "OpClass.h"
-#include "OpFormatGen.h"
-#include "OpGenHelpers.h"
+#include "mlir/TableGen/OpClass.h"
+#include "mlir/TableGen/OpFormatGen.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/Argument.h"
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Class.h"
diff --git a/mlir/lib/TableGen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
index d499c78a5cf44d..a8fb3ae8dfcd6a 100644
--- a/mlir/lib/TableGen/OpDocGen.cpp
+++ b/mlir/lib/TableGen/OpDocGen.cpp
@@ -11,9 +11,9 @@
//
//===----------------------------------------------------------------------===//
-#include "DialectGenUtilities.h"
-#include "DocGenUtilities.h"
-#include "OpGenHelpers.h"
+#include "mlir/TableGen/DialectGenUtilities.h"
+#include "mlir/TableGen/DocGenUtilities.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/Support/IndentedOstream.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Attribute.h"
diff --git a/mlir/lib/TableGen/OpFormatGen.cpp b/mlir/lib/TableGen/OpFormatGen.cpp
index 3bf6f2f6d38176..29a678d6a9dbd1 100644
--- a/mlir/lib/TableGen/OpFormatGen.cpp
+++ b/mlir/lib/TableGen/OpFormatGen.cpp
@@ -6,9 +6,9 @@
//
//===----------------------------------------------------------------------===//
-#include "OpFormatGen.h"
-#include "FormatGen.h"
-#include "OpClass.h"
+#include "mlir/TableGen/OpFormatGen.h"
+#include "mlir/TableGen/FormatGen.h"
+#include "mlir/TableGen/OpClass.h"
#include "mlir/Support/LLVM.h"
#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/Format.h"
diff --git a/mlir/lib/TableGen/OpGenHelpers.cpp b/mlir/lib/TableGen/OpGenHelpers.cpp
index 44dbacf19fffd4..4156427f9fc78c 100644
--- a/mlir/lib/TableGen/OpGenHelpers.cpp
+++ b/mlir/lib/TableGen/OpGenHelpers.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "OpGenHelpers.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormatVariadic.h"
diff --git a/mlir/lib/TableGen/OpInterfacesGen.cpp b/mlir/lib/TableGen/OpInterfacesGen.cpp
index 1f1b1d9a340391..f306e5e8e6e39d 100644
--- a/mlir/lib/TableGen/OpInterfacesGen.cpp
+++ b/mlir/lib/TableGen/OpInterfacesGen.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "DocGenUtilities.h"
+#include "mlir/TableGen/DocGenUtilities.h"
#include "mlir/TableGen/Format.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Interfaces.h"
diff --git a/mlir/lib/TableGen/OpPythonBindingGen.cpp b/mlir/lib/TableGen/OpPythonBindingGen.cpp
index 0c5c936f5addee..68316ea359261b 100644
--- a/mlir/lib/TableGen/OpPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/OpPythonBindingGen.cpp
@@ -11,7 +11,7 @@
//
//===----------------------------------------------------------------------===//
-#include "OpGenHelpers.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Operator.h"
diff --git a/mlir/lib/TableGen/PassDocGen.cpp b/mlir/lib/TableGen/PassDocGen.cpp
index a2cb514ece3eba..3bf2ba3323d47b 100644
--- a/mlir/lib/TableGen/PassDocGen.cpp
+++ b/mlir/lib/TableGen/PassDocGen.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "DocGenUtilities.h"
+#include "mlir/TableGen/DocGenUtilities.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Pass.h"
#include "llvm/Support/FormatVariadic.h"
>From b0d0bf51010ba39086816f8327c98eed7ee223ed Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 17:17:11 -0400
Subject: [PATCH 03/24] rename statics to be more specific
---
mlir/lib/TableGen/DirectiveCommonGen.cpp | 6 +-
mlir/lib/TableGen/EnumsGen.cpp | 2 +-
mlir/lib/TableGen/LLVMIRConversionGen.cpp | 38 +++++---
mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp | 5 +-
mlir/lib/TableGen/OmpOpGen.cpp | 10 +-
mlir/lib/TableGen/OpDefinitionsGen.cpp | 6 +-
mlir/lib/TableGen/OpDocGen.cpp | 59 +++++------
mlir/lib/TableGen/OpInterfacesGen.cpp | 13 ++-
mlir/lib/TableGen/OpPythonBindingGen.cpp | 5 +-
mlir/lib/TableGen/PassDocGen.cpp | 12 +--
mlir/lib/TableGen/PassGen.cpp | 4 +-
mlir/lib/TableGen/RewriterGen.cpp | 10 +-
mlir/lib/TableGen/SPIRVUtilsGen.cpp | 114 +++++++++++-----------
13 files changed, 151 insertions(+), 133 deletions(-)
diff --git a/mlir/lib/TableGen/DirectiveCommonGen.cpp b/mlir/lib/TableGen/DirectiveCommonGen.cpp
index 09c068fb766935..c9693f13bdfc36 100644
--- a/mlir/lib/TableGen/DirectiveCommonGen.cpp
+++ b/mlir/lib/TableGen/DirectiveCommonGen.cpp
@@ -42,8 +42,8 @@ using llvm::RecordKeeper;
// Clause record in OMP.td. This name can be used to specify the type of the
// OpenMP operation's operand. The allowedClauseValues field provides the list
// of ClauseValues which are part of the enumeration.
-static bool emitDecls(const RecordKeeper &records, llvm::StringRef dialect,
- raw_ostream &os) {
+static bool emitDirectiveDecls(const RecordKeeper &records,
+ llvm::StringRef dialect, raw_ostream &os) {
// A dialect must be selected for the generated attributes.
if (dialect.empty()) {
llvm::PrintFatalError("a dialect must be selected for the directives via "
@@ -108,5 +108,5 @@ static mlir::GenRegistration genDirectiveDecls(
"gen-directive-decl",
"Generate declarations for directives (OpenMP/OpenACC etc.)",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitDecls(records, dialect, os);
+ return emitDirectiveDecls(records, dialect, os);
});
diff --git a/mlir/lib/TableGen/EnumsGen.cpp b/mlir/lib/TableGen/EnumsGen.cpp
index f64f1a038950d5..82339bb08a132e 100644
--- a/mlir/lib/TableGen/EnumsGen.cpp
+++ b/mlir/lib/TableGen/EnumsGen.cpp
@@ -10,9 +10,9 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/FormatGen.h"
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Format.h"
+#include "mlir/TableGen/FormatGen.h"
#include "mlir/TableGen/GenInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
diff --git a/mlir/lib/TableGen/LLVMIRConversionGen.cpp b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
index 9e19f479d673a0..d057cf3255ed66 100644
--- a/mlir/lib/TableGen/LLVMIRConversionGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
@@ -177,7 +177,8 @@ static LogicalResult emitOneBuilder(const Record &record, raw_ostream &os) {
// Emit all builders. Returns false on success because of the generator
// registration requirements.
-static bool emitBuilders(const RecordKeeper &records, raw_ostream &os) {
+static bool emitLLVMIRConversionBuilders(const RecordKeeper &records,
+ raw_ostream &os) {
for (const Record *def : records.getAllDerivedDefinitions("LLVM_OpBase")) {
if (failed(emitOneBuilder(*def, os)))
return true;
@@ -304,7 +305,8 @@ static LogicalResult emitOneMLIRBuilder(const Record &record, raw_ostream &os,
// Emit all intrinsic MLIR builders. Returns false on success because of the
// generator registration requirements.
-static bool emitIntrMLIRBuilders(const RecordKeeper &records, raw_ostream &os) {
+static bool emitLLVMIRIntrMLIRBuilders(const RecordKeeper &records,
+ raw_ostream &os) {
// Emit condition to check if "llvmEnumName" matches the intrinsic id.
auto emitIntrCond = [](const Record &record) {
return "intrinsicID == llvm::Intrinsic::" +
@@ -320,7 +322,8 @@ static bool emitIntrMLIRBuilders(const RecordKeeper &records, raw_ostream &os) {
// Emit all op builders. Returns false on success because of the
// generator registration requirements.
-static bool emitOpMLIRBuilders(const RecordKeeper &records, raw_ostream &os) {
+static bool emitLLVMIROpMLIRBuilders(const RecordKeeper &records,
+ raw_ostream &os) {
// Emit condition to check if "llvmInstName" matches the instruction opcode.
auto emitOpcodeCond = [](const Record &record) {
return "inst->getOpcode() == llvm::Instruction::" +
@@ -532,8 +535,8 @@ static void emitOneCEnumFromConversion(const Record *record, raw_ostream &os) {
// Emits conversion functions between MLIR enum attribute case and corresponding
// LLVM API enumerants for all registered LLVM dialect enum attributes.
template <bool ConvertTo>
-static bool emitEnumConversionDefs(const RecordKeeper &records,
- raw_ostream &os) {
+static bool emitLLVMIREnumConversionDefs(const RecordKeeper &records,
+ raw_ostream &os) {
for (const Record *def : records.getAllDerivedDefinitions("LLVM_EnumAttr"))
if (ConvertTo)
emitOneEnumToConversion(def, os);
@@ -556,8 +559,8 @@ static void emitOneIntrinsic(const Record &record, raw_ostream &os) {
// Emit the list of LLVM IR intrinsics identifiers that are convertible to a
// matching MLIR LLVM dialect intrinsic operation.
-static bool emitConvertibleIntrinsics(const RecordKeeper &records,
- raw_ostream &os) {
+static bool emitConvertibleLLVMIRIntrinsics(const RecordKeeper &records,
+ raw_ostream &os) {
for (const Record *def : records.getAllDerivedDefinitions("LLVM_IntrOpBase"))
emitOneIntrinsic(*def, os);
@@ -566,27 +569,30 @@ static bool emitConvertibleIntrinsics(const RecordKeeper &records,
static mlir::GenRegistration
genLLVMIRConversions("gen-llvmir-conversions",
- "Generate LLVM IR conversions", emitBuilders);
+ "Generate LLVM IR conversions",
+ emitLLVMIRConversionBuilders);
static mlir::GenRegistration genOpFromLLVMIRConversions(
"gen-op-from-llvmir-conversions",
- "Generate conversions of operations from LLVM IR", emitOpMLIRBuilders);
+ "Generate conversions of operations from LLVM IR",
+ emitLLVMIROpMLIRBuilders);
static mlir::GenRegistration genIntrFromLLVMIRConversions(
"gen-intr-from-llvmir-conversions",
- "Generate conversions of intrinsics from LLVM IR", emitIntrMLIRBuilders);
+ "Generate conversions of intrinsics from LLVM IR",
+ emitLLVMIRIntrMLIRBuilders);
static mlir::GenRegistration
genEnumToLLVMConversion("gen-enum-to-llvmir-conversions",
"Generate conversions of EnumAttrs to LLVM IR",
- emitEnumConversionDefs</*ConvertTo=*/true>);
+ emitLLVMIREnumConversionDefs</*ConvertTo=*/true>);
-static mlir::GenRegistration
- genEnumFromLLVMConversion("gen-enum-from-llvmir-conversions",
- "Generate conversions of EnumAttrs from LLVM IR",
- emitEnumConversionDefs</*ConvertTo=*/false>);
+static mlir::GenRegistration genEnumFromLLVMConversion(
+ "gen-enum-from-llvmir-conversions",
+ "Generate conversions of EnumAttrs from LLVM IR",
+ emitLLVMIREnumConversionDefs</*ConvertTo=*/false>);
static mlir::GenRegistration genConvertibleLLVMIRIntrinsics(
"gen-convertible-llvmir-intrinsics",
"Generate list of convertible LLVM IR intrinsics",
- emitConvertibleIntrinsics);
+ emitConvertibleLLVMIRIntrinsics);
diff --git a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
index 411a98a48bfb28..fa43dd8cd498bf 100644
--- a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
@@ -250,7 +250,8 @@ static bool emitIntrinsic(const Record &record, llvm::raw_ostream &os) {
/// Traverses the list of TableGen definitions derived from the "Intrinsic"
/// class and generates MLIR ODS definitions for those intrinsics that have
/// the name matching the filter.
-static bool emitIntrinsics(const RecordKeeper &records, llvm::raw_ostream &os) {
+static bool emitLLVMIRIntrinsics(const RecordKeeper &records,
+ llvm::raw_ostream &os) {
llvm::emitSourceFileHeader("Operations for LLVM intrinsics", os, records);
os << "include \"mlir/Dialect/LLVMIR/LLVMOpBase.td\"\n";
os << "include \"mlir/Interfaces/SideEffectInterfaces.td\"\n\n";
@@ -268,4 +269,4 @@ static bool emitIntrinsics(const RecordKeeper &records, llvm::raw_ostream &os) {
static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
"Generate LLVM IR intrinsics",
- emitIntrinsics);
+ emitLLVMIRIntrinsics);
diff --git a/mlir/lib/TableGen/OmpOpGen.cpp b/mlir/lib/TableGen/OmpOpGen.cpp
index 04f81a4a2dce1a..b9988dfdffd5eb 100644
--- a/mlir/lib/TableGen/OmpOpGen.cpp
+++ b/mlir/lib/TableGen/OmpOpGen.cpp
@@ -329,7 +329,7 @@ static void genOperandsDef(const Record *op, raw_ostream &os) {
/// Verify that all properties of `OpenMP_Clause`s of records deriving from
/// `OpenMP_Op`s have been inherited by the latter.
-static bool verifyDecls(const RecordKeeper &records, raw_ostream &) {
+static bool verifyOpenmpDecls(const RecordKeeper &records, raw_ostream &) {
for (const Record *op : records.getAllDerivedDefinitions("OpenMP_Op")) {
for (const Record *clause : op->getValueAsListOfDefs("clauseList"))
verifyClause(op, clause);
@@ -342,7 +342,7 @@ static bool verifyDecls(const RecordKeeper &records, raw_ostream &) {
/// `OpenMP_Clause` definitions and aggregate them into operation-specific
/// structures according to the `clauses` argument of each definition deriving
/// from `OpenMP_Op`.
-static bool genClauseOps(const RecordKeeper &records, raw_ostream &os) {
+static bool genOpenmpClauseOps(const RecordKeeper &records, raw_ostream &os) {
mlir::tblgen::NamespaceEmitter ns(os, "mlir::omp");
for (const Record *clause : records.getAllDerivedDefinitions("OpenMP_Clause"))
genClauseOpsStruct(clause, os);
@@ -360,9 +360,9 @@ static bool genClauseOps(const RecordKeeper &records, raw_ostream &os) {
static mlir::GenRegistration
verifyOpenmpOps("verify-openmp-ops",
"Verify OpenMP operations (produce no output file)",
- verifyDecls);
+ verifyOpenmpDecls);
static mlir::GenRegistration
- genOpenmpClauseOps("gen-openmp-clause-ops",
+ regOpenmpClauseOps("gen-openmp-clause-ops",
"Generate OpenMP clause operand structures",
- genClauseOps);
+ genOpenmpClauseOps);
diff --git a/mlir/lib/TableGen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
index 4ffdfec76c886f..4616a07163ea64 100644
--- a/mlir/lib/TableGen/OpDefinitionsGen.cpp
+++ b/mlir/lib/TableGen/OpDefinitionsGen.cpp
@@ -11,9 +11,6 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/OpClass.h"
-#include "mlir/TableGen/OpFormatGen.h"
-#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/Argument.h"
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Class.h"
@@ -21,6 +18,9 @@
#include "mlir/TableGen/Format.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Interfaces.h"
+#include "mlir/TableGen/OpClass.h"
+#include "mlir/TableGen/OpFormatGen.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/Operator.h"
#include "mlir/TableGen/Property.h"
#include "mlir/TableGen/SideEffects.h"
diff --git a/mlir/lib/TableGen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
index a8fb3ae8dfcd6a..95841eac041ba7 100644
--- a/mlir/lib/TableGen/OpDocGen.cpp
+++ b/mlir/lib/TableGen/OpDocGen.cpp
@@ -11,13 +11,13 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/DialectGenUtilities.h"
-#include "mlir/TableGen/DocGenUtilities.h"
-#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/Support/IndentedOstream.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Attribute.h"
+#include "mlir/TableGen/DialectGenUtilities.h"
+#include "mlir/TableGen/DocGenUtilities.h"
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/Operator.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SetVector.h"
@@ -232,7 +232,8 @@ static void emitOpDoc(const Operator &op, raw_ostream &os) {
// Expandable description.
// This appears as just the summary, but when clicked shows the full
// description.
- os << "<details>" << "<summary>" << it.attr.getSummary() << "</summary>"
+ os << "<details>"
+ << "<summary>" << it.attr.getSummary() << "</summary>"
<< "{{% markdown %}}" << description << "{{% /markdown %}}"
<< "</details>";
} else {
@@ -608,36 +609,36 @@ static bool emitDialectDoc(const RecordKeeper &records, raw_ostream &os) {
//===----------------------------------------------------------------------===//
static mlir::GenRegistration
- genAttrRegister("gen-attrdef-doc",
- "Generate dialect attribute documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitAttrOrTypeDefDoc(records, os, "AttrDef");
- return false;
- });
+ genAttrDocRegister("gen-attrdef-doc",
+ "Generate dialect attribute documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitAttrOrTypeDefDoc(records, os, "AttrDef");
+ return false;
+ });
static mlir::GenRegistration
- genOpRegister("gen-op-doc", "Generate dialect documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitOpDoc(records, os);
- return false;
- });
+ genOpDocRegister("gen-op-doc", "Generate dialect documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitOpDoc(records, os);
+ return false;
+ });
static mlir::GenRegistration
- genTypeRegister("gen-typedef-doc", "Generate dialect type documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitAttrOrTypeDefDoc(records, os, "TypeDef");
- return false;
- });
+ genTypeDocRegister("gen-typedef-doc", "Generate dialect type documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitAttrOrTypeDefDoc(records, os, "TypeDef");
+ return false;
+ });
static mlir::GenRegistration
- genEnumRegister("gen-enum-doc", "Generate dialect enum documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitEnumDoc(records, os);
- return false;
- });
+ genEnumDocRegister("gen-enum-doc", "Generate dialect enum documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitEnumDoc(records, os);
+ return false;
+ });
static mlir::GenRegistration
- genRegister("gen-dialect-doc", "Generate dialect documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDoc(records, os);
- });
+ genPassDocRegister("gen-dialect-doc", "Generate dialect documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitDialectDoc(records, os);
+ });
diff --git a/mlir/lib/TableGen/OpInterfacesGen.cpp b/mlir/lib/TableGen/OpInterfacesGen.cpp
index f306e5e8e6e39d..68b75574b1380f 100644
--- a/mlir/lib/TableGen/OpInterfacesGen.cpp
+++ b/mlir/lib/TableGen/OpInterfacesGen.cpp
@@ -589,7 +589,8 @@ void InterfaceGenerator::emitInterfaceDecl(const Interface &interface) {
<< " auto* interface = getInterfaceFor(base);\n"
<< " if (!interface)\n"
" return false;\n"
- " " << interfaceName << " odsInterfaceInstance(base, interface);\n"
+ " "
+ << interfaceName << " odsInterfaceInstance(base, interface);\n"
<< " " << tblgen::tgfmt(extraClassOf->trim(), &extraClassOfFmt)
<< "\n }\n";
}
@@ -702,7 +703,9 @@ struct InterfaceGenRegistration {
};
} // namespace
-static InterfaceGenRegistration<AttrInterfaceGenerator> attrGen("attr",
- "attribute");
-static InterfaceGenRegistration<OpInterfaceGenerator> opGen("op", "op");
-static InterfaceGenRegistration<TypeInterfaceGenerator> typeGen("type", "type");
+static InterfaceGenRegistration<AttrInterfaceGenerator>
+ attrInterfaceGen("attr", "attribute");
+static InterfaceGenRegistration<OpInterfaceGenerator> opInterfaceGen("op",
+ "op");
+static InterfaceGenRegistration<TypeInterfaceGenerator>
+ typeInterfaceGen("type", "type");
diff --git a/mlir/lib/TableGen/OpPythonBindingGen.cpp b/mlir/lib/TableGen/OpPythonBindingGen.cpp
index 68316ea359261b..ec065526aa9512 100644
--- a/mlir/lib/TableGen/OpPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/OpPythonBindingGen.cpp
@@ -1027,7 +1027,7 @@ static void emitOpBindings(const Operator &op, raw_ostream &os) {
/// Emits bindings for the dialect specified in the command line, including file
/// headers and utilities. Returns `false` on success to comply with Tablegen
/// registration requirements.
-static bool emitAllOps(const RecordKeeper &records, raw_ostream &os) {
+static bool emitAllPythonOps(const RecordKeeper &records, raw_ostream &os) {
if (clDialectName.empty())
llvm::PrintFatalError("dialect name not provided");
@@ -1047,4 +1047,5 @@ static bool emitAllOps(const RecordKeeper &records, raw_ostream &os) {
static GenRegistration
genPythonBindings("gen-python-op-bindings",
- "Generate Python bindings for MLIR Ops", &emitAllOps);
+ "Generate Python bindings for MLIR Ops",
+ &emitAllPythonOps);
diff --git a/mlir/lib/TableGen/PassDocGen.cpp b/mlir/lib/TableGen/PassDocGen.cpp
index 3bf2ba3323d47b..17b7ac4e12c71d 100644
--- a/mlir/lib/TableGen/PassDocGen.cpp
+++ b/mlir/lib/TableGen/PassDocGen.cpp
@@ -57,7 +57,7 @@ static void emitDoc(const Pass &pass, raw_ostream &os) {
}
}
-static void emitDocs(const RecordKeeper &records, raw_ostream &os) {
+static void emitPassDocs(const RecordKeeper &records, raw_ostream &os) {
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
auto passDefs = records.getAllDerivedDefinitions("PassBase");
@@ -74,8 +74,8 @@ static void emitDocs(const RecordKeeper &records, raw_ostream &os) {
}
static mlir::GenRegistration
- genRegister("gen-pass-doc", "Generate pass documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitDocs(records, os);
- return false;
- });
+ genPassDocRegister("gen-pass-doc", "Generate pass documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitPassDocs(records, os);
+ return false;
+ });
diff --git a/mlir/lib/TableGen/PassGen.cpp b/mlir/lib/TableGen/PassGen.cpp
index 4b4ac41b9effb8..2357058d395bd3 100644
--- a/mlir/lib/TableGen/PassGen.cpp
+++ b/mlir/lib/TableGen/PassGen.cpp
@@ -446,7 +446,7 @@ static void emitOldPassDecl(const Pass &pass, raw_ostream &os) {
os << "};\n";
}
-static void emitPasses(const RecordKeeper &records, raw_ostream &os) {
+static void emitPassDecls(const RecordKeeper &records, raw_ostream &os) {
std::vector<Pass> passes = getPasses(records);
os << "/* Autogenerated by mlir-tblgen; don't manually edit */\n";
@@ -476,6 +476,6 @@ static void emitPasses(const RecordKeeper &records, raw_ostream &os) {
static mlir::GenRegistration
genPassDecls("gen-pass-decls", "Generate pass declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- emitPasses(records, os);
+ emitPassDecls(records, os);
return false;
});
diff --git a/mlir/lib/TableGen/RewriterGen.cpp b/mlir/lib/TableGen/RewriterGen.cpp
index e2764f8493cd8a..408331ba1247a1 100644
--- a/mlir/lib/TableGen/RewriterGen.cpp
+++ b/mlir/lib/TableGen/RewriterGen.cpp
@@ -614,7 +614,8 @@ void PatternEmitter::emitOpMatch(DagNode tree, StringRef opName, int depth) {
++opArgIdx;
continue;
}
- if (auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
+ if (auto *operand =
+ llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
if (argTree.isVariadic()) {
if (!operand->isVariadic()) {
auto error = formatv("variadic DAG construct can't match op {0}'s "
@@ -1699,8 +1700,8 @@ void PatternEmitter::createSeparateLocalVarsForOpArgs(
int valueIndex = 0; // An index for uniquing local variable names.
for (int argIndex = 0, e = resultOp.getNumArgs(); argIndex < e; ++argIndex) {
- const auto *operand =
- llvm::dyn_cast_if_present<NamedTypeConstraint *>(resultOp.getArg(argIndex));
+ const auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(
+ resultOp.getArg(argIndex));
// We do not need special handling for attributes.
if (!operand)
continue;
@@ -1755,7 +1756,8 @@ void PatternEmitter::supplyValuesForOpArgs(
Argument opArg = resultOp.getArg(argIndex);
// Handle the case of operand first.
- if (auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
+ if (auto *operand =
+ llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
if (!operand->name.empty())
os << "/*" << operand->name << "=*/";
os << childNodeNames.lookup(argIndex);
diff --git a/mlir/lib/TableGen/SPIRVUtilsGen.cpp b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
index 75286231f5902f..6711ae7a57220e 100644
--- a/mlir/lib/TableGen/SPIRVUtilsGen.cpp
+++ b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
@@ -196,7 +196,8 @@ static void emitInterfaceDef(const Availability &availability,
<< "}\n";
}
-static bool emitInterfaceDefs(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPRIVInterfaceDefs(const RecordKeeper &records,
+ raw_ostream &os) {
llvm::emitSourceFileHeader("Availability Interface Definitions", os, records);
auto defs = records.getAllDerivedDefinitions("Availability");
@@ -284,7 +285,8 @@ static void emitInterfaceDecl(const Availability &availability,
os << "};\n\n";
}
-static bool emitInterfaceDecls(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPRIVInterfaceDecls(const RecordKeeper &records,
+ raw_ostream &os) {
llvm::emitSourceFileHeader("Availability Interface Declarations", os,
records);
@@ -313,19 +315,19 @@ static bool emitInterfaceDecls(const RecordKeeper &records, raw_ostream &os) {
// Registers the operation interface generator to mlir-tblgen.
static mlir::GenRegistration
- genInterfaceDecls("gen-avail-interface-decls",
- "Generate availability interface declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitInterfaceDecls(records, os);
- });
+ genSPIRVInterfaceDecls("gen-avail-interface-decls",
+ "Generate availability interface declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPRIVInterfaceDecls(records, os);
+ });
// Registers the operation interface generator to mlir-tblgen.
static mlir::GenRegistration
- genInterfaceDefs("gen-avail-interface-defs",
- "Generate op interface definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitInterfaceDefs(records, os);
- });
+ genSPIRVInterfaceDefs("gen-avail-interface-defs",
+ "Generate op interface definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPRIVInterfaceDefs(records, os);
+ });
//===----------------------------------------------------------------------===//
// Enum Availability Query AutoGen
@@ -397,10 +399,9 @@ static void emitAvailabilityQueryForBitEnum(const Record &enumDef,
avail.getMergeInstanceType(), avail.getQueryFnName(),
enumName);
- os << formatv(
- " assert(::llvm::popcount(static_cast<{0}>(value)) <= 1"
- " && \"cannot have more than one bit set\");\n",
- underlyingType);
+ os << formatv(" assert(::llvm::popcount(static_cast<{0}>(value)) <= 1"
+ " && \"cannot have more than one bit set\");\n",
+ underlyingType);
os << " switch (value) {\n";
for (const auto &caseSpecPair : classCasePair.getValue()) {
@@ -448,7 +449,7 @@ static void emitEnumDecl(const Record &enumDef, raw_ostream &os) {
os << "} // namespace " << ns << "\n";
}
-static bool emitEnumDecls(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPRIVEnumDecls(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Enum Availability Declarations", os,
records);
@@ -480,7 +481,7 @@ static void emitEnumDef(const Record &enumDef, raw_ostream &os) {
os << "\n";
}
-static bool emitEnumDefs(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPIRVEnumDefs(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Enum Availability Definitions", os,
records);
@@ -497,19 +498,19 @@ static bool emitEnumDefs(const RecordKeeper &records, raw_ostream &os) {
// Registers the enum utility generator to mlir-tblgen.
static mlir::GenRegistration
- genEnumDecls("gen-spirv-enum-avail-decls",
- "Generate SPIR-V enum availability declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitEnumDecls(records, os);
- });
+ genSPIRVEnumDecls("gen-spirv-enum-avail-decls",
+ "Generate SPIR-V enum availability declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPRIVEnumDecls(records, os);
+ });
// Registers the enum utility generator to mlir-tblgen.
static mlir::GenRegistration
- genEnumDefs("gen-spirv-enum-avail-defs",
- "Generate SPIR-V enum availability definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitEnumDefs(records, os);
- });
+ genSPIRVEnumDefs("gen-spirv-enum-avail-defs",
+ "Generate SPIR-V enum availability definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVEnumDefs(records, os);
+ });
//===----------------------------------------------------------------------===//
// Serialization AutoGen
@@ -933,7 +934,8 @@ static void emitOperandDeserialization(const Operator &op, ArrayRef<SMLoc> loc,
// Process operands/attributes
for (unsigned i = 0, e = op.getNumArgs(); i < e; ++i) {
auto argument = op.getArg(i);
- if (auto *valueArg = llvm::dyn_cast_if_present<NamedTypeConstraint *>(argument)) {
+ if (auto *valueArg =
+ llvm::dyn_cast_if_present<NamedTypeConstraint *>(argument)) {
if (valueArg->isVariableLength()) {
if (i != e - 1) {
PrintFatalError(
@@ -1176,7 +1178,8 @@ static void emitExtendedSetDeserializationDispatch(const RecordKeeper &records,
/// Emits all the autogenerated serialization/deserializations functions for the
/// SPIRV_Ops.
-static bool emitSerializationFns(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPIRVSerializationFns(const RecordKeeper &records,
+ raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Serialization Utilities/Functions", os,
records);
@@ -1228,11 +1231,11 @@ static bool emitSerializationFns(const RecordKeeper &records, raw_ostream &os) {
// Serialization Hook Registration
//===----------------------------------------------------------------------===//
-static mlir::GenRegistration genSerialization(
+static mlir::GenRegistration genSPIRVSerialization(
"gen-spirv-serialization",
"Generate SPIR-V (de)serialization utilities and functions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSerializationFns(records, os);
+ return emitSPIRVSerializationFns(records, os);
});
//===----------------------------------------------------------------------===//
@@ -1256,7 +1259,7 @@ static void emitEnumGetAttrNameFnDefn(const EnumAttr &enumAttr,
os << "}\n";
}
-static bool emitAttrUtils(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPIRVAttrUtils(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Attribute Utilities", os, records);
auto defs = records.getAllDerivedDefinitions("EnumAttrInfo");
@@ -1276,17 +1279,17 @@ static bool emitAttrUtils(const RecordKeeper &records, raw_ostream &os) {
//===----------------------------------------------------------------------===//
static mlir::GenRegistration
- genOpUtils("gen-spirv-attr-utils",
- "Generate SPIR-V attribute utility definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitAttrUtils(records, os);
- });
+ genSPIRVAttrUtils("gen-spirv-attr-utils",
+ "Generate SPIR-V attribute utility definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVAttrUtils(records, os);
+ });
//===----------------------------------------------------------------------===//
// SPIR-V Availability Impl AutoGen
//===----------------------------------------------------------------------===//
-static void emitAvailabilityImpl(const Operator &srcOp, raw_ostream &os) {
+static void emitSPIRVAvailabilityImpl(const Operator &srcOp, raw_ostream &os) {
mlir::tblgen::FmtContext fctx;
fctx.addSubst("overall", "tblgen_overall");
@@ -1400,7 +1403,8 @@ static void emitAvailabilityImpl(const Operator &srcOp, raw_ostream &os) {
}
}
-static bool emitAvailabilityImpl(const RecordKeeper &records, raw_ostream &os) {
+static bool emitSPIRVAvailabilityImpl(const RecordKeeper &records,
+ raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Op Availability Implementations", os,
records);
@@ -1408,7 +1412,7 @@ static bool emitAvailabilityImpl(const RecordKeeper &records, raw_ostream &os) {
for (const auto *def : defs) {
Operator op(def);
if (def->getValueAsBit("autogenAvailability"))
- emitAvailabilityImpl(op, os);
+ emitSPIRVAvailabilityImpl(op, os);
}
return false;
}
@@ -1418,18 +1422,18 @@ static bool emitAvailabilityImpl(const RecordKeeper &records, raw_ostream &os) {
//===----------------------------------------------------------------------===//
static mlir::GenRegistration
- genOpAvailabilityImpl("gen-spirv-avail-impls",
- "Generate SPIR-V operation utility definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitAvailabilityImpl(records, os);
- });
+ genSPIRVAvailabilityImpl("gen-spirv-avail-impls",
+ "Generate SPIR-V operation utility definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVAvailabilityImpl(records, os);
+ });
//===----------------------------------------------------------------------===//
// SPIR-V Capability Implication AutoGen
//===----------------------------------------------------------------------===//
-static bool emitCapabilityImplication(const RecordKeeper &records,
- raw_ostream &os) {
+static bool emitSPIRVCapabilityImplication(const RecordKeeper &records,
+ raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Capability Implication", os, records);
EnumAttr enumAttr(
@@ -1465,10 +1469,10 @@ static bool emitCapabilityImplication(const RecordKeeper &records,
// SPIR-V Capability Implication Hook Registration
//===----------------------------------------------------------------------===//
-static mlir::GenRegistration
- genCapabilityImplication("gen-spirv-capability-implication",
- "Generate utility function to return implied "
- "capabilities for a given capability",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitCapabilityImplication(records, os);
- });
+static mlir::GenRegistration genSPIRVCapabilityImplication(
+ "gen-spirv-capability-implication",
+ "Generate utility function to return implied "
+ "capabilities for a given capability",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVCapabilityImplication(records, os);
+ });
>From fbdc59b4fe4a7d81e9052956fbb674a09e40616c Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 17:28:19 -0400
Subject: [PATCH 04/24] move registration hooks (doesn't compile)
---
mlir/lib/TableGen/AttrOrTypeDefGen.cpp | 65 +---
mlir/lib/TableGen/BytecodeDialectGen.cpp | 6 -
mlir/lib/TableGen/DialectGen.cpp | 18 +-
mlir/lib/TableGen/DirectiveCommonGen.cpp | 15 -
mlir/lib/TableGen/EnumPythonBindingGen.cpp | 6 -
mlir/lib/TableGen/EnumsGen.cpp | 14 -
mlir/lib/TableGen/LLVMIRConversionGen.cpp | 30 --
mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp | 4 -
mlir/lib/TableGen/OmpOpGen.cpp | 11 -
mlir/lib/TableGen/OpDefinitionsGen.cpp | 12 -
mlir/lib/TableGen/OpDocGen.cpp | 39 --
mlir/lib/TableGen/OpInterfacesGen.cpp | 40 --
mlir/lib/TableGen/OpPythonBindingGen.cpp | 5 -
mlir/lib/TableGen/PassCAPIGen.cpp | 8 -
mlir/lib/TableGen/PassDocGen.cpp | 7 -
mlir/lib/TableGen/PassGen.cpp | 7 -
mlir/lib/TableGen/RewriterGen.cpp | 7 -
mlir/lib/TableGen/SPIRVUtilsGen.cpp | 85 -----
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 406 +++++++++++++++++++++
19 files changed, 408 insertions(+), 377 deletions(-)
diff --git a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
index e71fd8772e4c88..ff80752e5a0b32 100644
--- a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/AttrOrTypeFormatGen.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
+#include "mlir/TableGen/AttrOrTypeFormatGen.h"
#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/CodeGenHelpers.h"
#include "mlir/TableGen/Format.h"
@@ -1073,66 +1073,3 @@ bool {0}(::mlir::Type type) {
os << strfmt(typeConstraintDef, *constr.getCppFunctionName(), condition);
}
}
-
-//===----------------------------------------------------------------------===//
-// GEN: Registration hooks
-//===----------------------------------------------------------------------===//
-
-//===----------------------------------------------------------------------===//
-// AttrDef
-
-static llvm::cl::OptionCategory attrdefGenCat("Options for -gen-attrdef-*");
-static llvm::cl::opt<std::string>
- attrDialect("attrdefs-dialect",
- llvm::cl::desc("Generate attributes for this dialect"),
- llvm::cl::cat(attrdefGenCat), llvm::cl::CommaSeparated);
-
-static mlir::GenRegistration
- genAttrDefs("gen-attrdef-defs", "Generate AttrDef definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- AttrDefGenerator generator(records, os);
- return generator.emitDefs(attrDialect);
- });
-static mlir::GenRegistration
- genAttrDecls("gen-attrdef-decls", "Generate AttrDef declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- AttrDefGenerator generator(records, os);
- return generator.emitDecls(attrDialect);
- });
-
-//===----------------------------------------------------------------------===//
-// TypeDef
-
-static llvm::cl::OptionCategory typedefGenCat("Options for -gen-typedef-*");
-static llvm::cl::opt<std::string>
- typeDialect("typedefs-dialect",
- llvm::cl::desc("Generate types for this dialect"),
- llvm::cl::cat(typedefGenCat), llvm::cl::CommaSeparated);
-
-static mlir::GenRegistration
- genTypeDefs("gen-typedef-defs", "Generate TypeDef definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- TypeDefGenerator generator(records, os);
- return generator.emitDefs(typeDialect);
- });
-static mlir::GenRegistration
- genTypeDecls("gen-typedef-decls", "Generate TypeDef declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- TypeDefGenerator generator(records, os);
- return generator.emitDecls(typeDialect);
- });
-
-static mlir::GenRegistration
- genTypeConstrDefs("gen-type-constraint-defs",
- "Generate type constraint definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitTypeConstraintDefs(records, os);
- return false;
- });
-static mlir::GenRegistration
- genTypeConstrDecls("gen-type-constraint-decls",
- "Generate type constraint declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitTypeConstraintDecls(records, os);
- return false;
- });
diff --git a/mlir/lib/TableGen/BytecodeDialectGen.cpp b/mlir/lib/TableGen/BytecodeDialectGen.cpp
index d7967c7a77534d..c48f93f6987037 100644
--- a/mlir/lib/TableGen/BytecodeDialectGen.cpp
+++ b/mlir/lib/TableGen/BytecodeDialectGen.cpp
@@ -484,9 +484,3 @@ static bool emitBCRW(const RecordKeeper &records, raw_ostream &os) {
return false;
}
-
-static mlir::GenRegistration
- genBCRW("gen-bytecode", "Generate dialect bytecode readers/writers",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitBCRW(records, os);
- });
diff --git a/mlir/lib/TableGen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
index 1e8ab8f2576e79..a03ce4a404c9ee 100644
--- a/mlir/lib/TableGen/DialectGen.cpp
+++ b/mlir/lib/TableGen/DialectGen.cpp
@@ -10,9 +10,9 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/DialectGenUtilities.h"
#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/CodeGenHelpers.h"
+#include "mlir/TableGen/DialectGenUtilities.h"
#include "mlir/TableGen/Format.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Interfaces.h"
@@ -404,19 +404,3 @@ static bool emitDialectDefs(const RecordKeeper &records, raw_ostream &os) {
emitDialectDef(*dialect, records, os);
return false;
}
-
-//===----------------------------------------------------------------------===//
-// GEN: Dialect registration hooks
-//===----------------------------------------------------------------------===//
-
-static mlir::GenRegistration
- genDialectDecls("gen-dialect-decls", "Generate dialect declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDecls(records, os);
- });
-
-static mlir::GenRegistration
- genDialectDefs("gen-dialect-defs", "Generate dialect definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDefs(records, os);
- });
diff --git a/mlir/lib/TableGen/DirectiveCommonGen.cpp b/mlir/lib/TableGen/DirectiveCommonGen.cpp
index c9693f13bdfc36..7d6a3688a63aa0 100644
--- a/mlir/lib/TableGen/DirectiveCommonGen.cpp
+++ b/mlir/lib/TableGen/DirectiveCommonGen.cpp
@@ -95,18 +95,3 @@ static bool emitDirectiveDecls(const RecordKeeper &records,
}
return false;
}
-
-static llvm::cl::OptionCategory
- directiveGenCat("Options for gen-directive-decl");
-static llvm::cl::opt<std::string>
- dialect("directives-dialect",
- llvm::cl::desc("Generate directives for this dialect"),
- llvm::cl::cat(directiveGenCat), llvm::cl::CommaSeparated);
-
-// Registers the generator to mlir-tblgen.
-static mlir::GenRegistration genDirectiveDecls(
- "gen-directive-decl",
- "Generate declarations for directives (OpenMP/OpenACC etc.)",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitDirectiveDecls(records, dialect, os);
- });
diff --git a/mlir/lib/TableGen/EnumPythonBindingGen.cpp b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
index e5f13ce4de3b08..b063a1ec6c8e82 100644
--- a/mlir/lib/TableGen/EnumPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
@@ -168,9 +168,3 @@ static bool emitPythonEnums(const RecordKeeper &records, raw_ostream &os) {
return false;
}
-
-// Registers the enum utility generator to mlir-tblgen.
-static mlir::GenRegistration
- genPythonEnumBindings("gen-python-enum-bindings",
- "Generate Python bindings for enum attributes",
- &emitPythonEnums);
diff --git a/mlir/lib/TableGen/EnumsGen.cpp b/mlir/lib/TableGen/EnumsGen.cpp
index 82339bb08a132e..244a97e5a6d350 100644
--- a/mlir/lib/TableGen/EnumsGen.cpp
+++ b/mlir/lib/TableGen/EnumsGen.cpp
@@ -688,17 +688,3 @@ static bool emitEnumDefs(const RecordKeeper &records, raw_ostream &os) {
return false;
}
-
-// Registers the enum utility generator to mlir-tblgen.
-static mlir::GenRegistration
- genEnumDecls("gen-enum-decls", "Generate enum utility declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitEnumDecls(records, os);
- });
-
-// Registers the enum utility generator to mlir-tblgen.
-static mlir::GenRegistration
- genEnumDefs("gen-enum-defs", "Generate enum utility definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitEnumDefs(records, os);
- });
diff --git a/mlir/lib/TableGen/LLVMIRConversionGen.cpp b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
index d057cf3255ed66..2cbcb19e294fa7 100644
--- a/mlir/lib/TableGen/LLVMIRConversionGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
@@ -566,33 +566,3 @@ static bool emitConvertibleLLVMIRIntrinsics(const RecordKeeper &records,
return false;
}
-
-static mlir::GenRegistration
- genLLVMIRConversions("gen-llvmir-conversions",
- "Generate LLVM IR conversions",
- emitLLVMIRConversionBuilders);
-
-static mlir::GenRegistration genOpFromLLVMIRConversions(
- "gen-op-from-llvmir-conversions",
- "Generate conversions of operations from LLVM IR",
- emitLLVMIROpMLIRBuilders);
-
-static mlir::GenRegistration genIntrFromLLVMIRConversions(
- "gen-intr-from-llvmir-conversions",
- "Generate conversions of intrinsics from LLVM IR",
- emitLLVMIRIntrMLIRBuilders);
-
-static mlir::GenRegistration
- genEnumToLLVMConversion("gen-enum-to-llvmir-conversions",
- "Generate conversions of EnumAttrs to LLVM IR",
- emitLLVMIREnumConversionDefs</*ConvertTo=*/true>);
-
-static mlir::GenRegistration genEnumFromLLVMConversion(
- "gen-enum-from-llvmir-conversions",
- "Generate conversions of EnumAttrs from LLVM IR",
- emitLLVMIREnumConversionDefs</*ConvertTo=*/false>);
-
-static mlir::GenRegistration genConvertibleLLVMIRIntrinsics(
- "gen-convertible-llvmir-intrinsics",
- "Generate list of convertible LLVM IR intrinsics",
- emitConvertibleLLVMIRIntrinsics);
diff --git a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
index fa43dd8cd498bf..3c9d71d8934b80 100644
--- a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
@@ -266,7 +266,3 @@ static bool emitLLVMIRIntrinsics(const RecordKeeper &records,
return false;
}
-
-static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
- "Generate LLVM IR intrinsics",
- emitLLVMIRIntrinsics);
diff --git a/mlir/lib/TableGen/OmpOpGen.cpp b/mlir/lib/TableGen/OmpOpGen.cpp
index b9988dfdffd5eb..4d92b2b2cbc645 100644
--- a/mlir/lib/TableGen/OmpOpGen.cpp
+++ b/mlir/lib/TableGen/OmpOpGen.cpp
@@ -355,14 +355,3 @@ static bool genOpenmpClauseOps(const RecordKeeper &records, raw_ostream &os) {
return false;
}
-
-// Registers the generator to mlir-tblgen.
-static mlir::GenRegistration
- verifyOpenmpOps("verify-openmp-ops",
- "Verify OpenMP operations (produce no output file)",
- verifyOpenmpDecls);
-
-static mlir::GenRegistration
- regOpenmpClauseOps("gen-openmp-clause-ops",
- "Generate OpenMP clause operand structures",
- genOpenmpClauseOps);
diff --git a/mlir/lib/TableGen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
index 4616a07163ea64..1d0632247c306f 100644
--- a/mlir/lib/TableGen/OpDefinitionsGen.cpp
+++ b/mlir/lib/TableGen/OpDefinitionsGen.cpp
@@ -4708,15 +4708,3 @@ static bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
}
return false;
}
-
-static mlir::GenRegistration
- genOpDecls("gen-op-decls", "Generate op declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitOpDecls(records, os);
- });
-
-static mlir::GenRegistration genOpDefs("gen-op-defs", "Generate op definitions",
- [](const RecordKeeper &records,
- raw_ostream &os) {
- return emitOpDefs(records, os);
- });
diff --git a/mlir/lib/TableGen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
index 95841eac041ba7..7831126c2e1a89 100644
--- a/mlir/lib/TableGen/OpDocGen.cpp
+++ b/mlir/lib/TableGen/OpDocGen.cpp
@@ -603,42 +603,3 @@ static bool emitDialectDoc(const RecordKeeper &records, raw_ostream &os) {
dialectEnums, os);
return false;
}
-
-//===----------------------------------------------------------------------===//
-// Gen Registration
-//===----------------------------------------------------------------------===//
-
-static mlir::GenRegistration
- genAttrDocRegister("gen-attrdef-doc",
- "Generate dialect attribute documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitAttrOrTypeDefDoc(records, os, "AttrDef");
- return false;
- });
-
-static mlir::GenRegistration
- genOpDocRegister("gen-op-doc", "Generate dialect documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitOpDoc(records, os);
- return false;
- });
-
-static mlir::GenRegistration
- genTypeDocRegister("gen-typedef-doc", "Generate dialect type documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitAttrOrTypeDefDoc(records, os, "TypeDef");
- return false;
- });
-
-static mlir::GenRegistration
- genEnumDocRegister("gen-enum-doc", "Generate dialect enum documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitEnumDoc(records, os);
- return false;
- });
-
-static mlir::GenRegistration
- genPassDocRegister("gen-dialect-doc", "Generate dialect documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDoc(records, os);
- });
diff --git a/mlir/lib/TableGen/OpInterfacesGen.cpp b/mlir/lib/TableGen/OpInterfacesGen.cpp
index 68b75574b1380f..e2cf18e0318e13 100644
--- a/mlir/lib/TableGen/OpInterfacesGen.cpp
+++ b/mlir/lib/TableGen/OpInterfacesGen.cpp
@@ -669,43 +669,3 @@ bool InterfaceGenerator::emitInterfaceDocs() {
emitInterfaceDoc(*def, os);
return false;
}
-
-//===----------------------------------------------------------------------===//
-// GEN: Interface registration hooks
-//===----------------------------------------------------------------------===//
-
-namespace {
-template <typename GeneratorT>
-struct InterfaceGenRegistration {
- InterfaceGenRegistration(StringRef genArg, StringRef genDesc)
- : genDeclArg(("gen-" + genArg + "-interface-decls").str()),
- genDefArg(("gen-" + genArg + "-interface-defs").str()),
- genDocArg(("gen-" + genArg + "-interface-docs").str()),
- genDeclDesc(("Generate " + genDesc + " interface declarations").str()),
- genDefDesc(("Generate " + genDesc + " interface definitions").str()),
- genDocDesc(("Generate " + genDesc + " interface documentation").str()),
- genDecls(genDeclArg, genDeclDesc,
- [](const RecordKeeper &records, raw_ostream &os) {
- return GeneratorT(records, os).emitInterfaceDecls();
- }),
- genDefs(genDefArg, genDefDesc,
- [](const RecordKeeper &records, raw_ostream &os) {
- return GeneratorT(records, os).emitInterfaceDefs();
- }),
- genDocs(genDocArg, genDocDesc,
- [](const RecordKeeper &records, raw_ostream &os) {
- return GeneratorT(records, os).emitInterfaceDocs();
- }) {}
-
- std::string genDeclArg, genDefArg, genDocArg;
- std::string genDeclDesc, genDefDesc, genDocDesc;
- mlir::GenRegistration genDecls, genDefs, genDocs;
-};
-} // namespace
-
-static InterfaceGenRegistration<AttrInterfaceGenerator>
- attrInterfaceGen("attr", "attribute");
-static InterfaceGenRegistration<OpInterfaceGenerator> opInterfaceGen("op",
- "op");
-static InterfaceGenRegistration<TypeInterfaceGenerator>
- typeInterfaceGen("type", "type");
diff --git a/mlir/lib/TableGen/OpPythonBindingGen.cpp b/mlir/lib/TableGen/OpPythonBindingGen.cpp
index ec065526aa9512..db1e76c5a9899e 100644
--- a/mlir/lib/TableGen/OpPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/OpPythonBindingGen.cpp
@@ -1044,8 +1044,3 @@ static bool emitAllPythonOps(const RecordKeeper &records, raw_ostream &os) {
}
return false;
}
-
-static GenRegistration
- genPythonBindings("gen-python-op-bindings",
- "Generate Python bindings for MLIR Ops",
- &emitAllPythonOps);
diff --git a/mlir/lib/TableGen/PassCAPIGen.cpp b/mlir/lib/TableGen/PassCAPIGen.cpp
index 8c13c9b0313352..e853e12908564b 100644
--- a/mlir/lib/TableGen/PassCAPIGen.cpp
+++ b/mlir/lib/TableGen/PassCAPIGen.cpp
@@ -111,11 +111,3 @@ static bool emitCAPIImpl(const RecordKeeper &records, raw_ostream &os) {
}
return false;
}
-
-static mlir::GenRegistration genCAPIHeader("gen-pass-capi-header",
- "Generate pass C API header",
- &emitCAPIHeader);
-
-static mlir::GenRegistration genCAPIImpl("gen-pass-capi-impl",
- "Generate pass C API implementation",
- &emitCAPIImpl);
diff --git a/mlir/lib/TableGen/PassDocGen.cpp b/mlir/lib/TableGen/PassDocGen.cpp
index 17b7ac4e12c71d..5e25f1dc763d1b 100644
--- a/mlir/lib/TableGen/PassDocGen.cpp
+++ b/mlir/lib/TableGen/PassDocGen.cpp
@@ -72,10 +72,3 @@ static void emitPassDocs(const RecordKeeper &records, raw_ostream &os) {
for (Pass *pass : sortedPasses)
emitDoc(*pass, os);
}
-
-static mlir::GenRegistration
- genPassDocRegister("gen-pass-doc", "Generate pass documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitPassDocs(records, os);
- return false;
- });
diff --git a/mlir/lib/TableGen/PassGen.cpp b/mlir/lib/TableGen/PassGen.cpp
index 2357058d395bd3..5ab3933150259f 100644
--- a/mlir/lib/TableGen/PassGen.cpp
+++ b/mlir/lib/TableGen/PassGen.cpp
@@ -472,10 +472,3 @@ static void emitPassDecls(const RecordKeeper &records, raw_ostream &os) {
os << "#undef GEN_PASS_CLASSES\n";
os << "#endif // GEN_PASS_CLASSES\n";
}
-
-static mlir::GenRegistration
- genPassDecls("gen-pass-decls", "Generate pass declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitPassDecls(records, os);
- return false;
- });
diff --git a/mlir/lib/TableGen/RewriterGen.cpp b/mlir/lib/TableGen/RewriterGen.cpp
index 408331ba1247a1..449dfce7f16b82 100644
--- a/mlir/lib/TableGen/RewriterGen.cpp
+++ b/mlir/lib/TableGen/RewriterGen.cpp
@@ -2000,10 +2000,3 @@ static void emitRewriters(const RecordKeeper &records, raw_ostream &os) {
}
os << "}\n";
}
-
-static mlir::GenRegistration
- genRewriters("gen-rewriters", "Generate pattern rewriters",
- [](const RecordKeeper &records, raw_ostream &os) {
- emitRewriters(records, os);
- return false;
- });
diff --git a/mlir/lib/TableGen/SPIRVUtilsGen.cpp b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
index 6711ae7a57220e..18f6fbd389178b 100644
--- a/mlir/lib/TableGen/SPIRVUtilsGen.cpp
+++ b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
@@ -309,26 +309,6 @@ static bool emitSPRIVInterfaceDecls(const RecordKeeper &records,
return false;
}
-//===----------------------------------------------------------------------===//
-// Availability Interface Hook Registration
-//===----------------------------------------------------------------------===//
-
-// Registers the operation interface generator to mlir-tblgen.
-static mlir::GenRegistration
- genSPIRVInterfaceDecls("gen-avail-interface-decls",
- "Generate availability interface declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPRIVInterfaceDecls(records, os);
- });
-
-// Registers the operation interface generator to mlir-tblgen.
-static mlir::GenRegistration
- genSPIRVInterfaceDefs("gen-avail-interface-defs",
- "Generate op interface definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPRIVInterfaceDefs(records, os);
- });
-
//===----------------------------------------------------------------------===//
// Enum Availability Query AutoGen
//===----------------------------------------------------------------------===//
@@ -492,26 +472,6 @@ static bool emitSPIRVEnumDefs(const RecordKeeper &records, raw_ostream &os) {
return false;
}
-//===----------------------------------------------------------------------===//
-// Enum Availability Query Hook Registration
-//===----------------------------------------------------------------------===//
-
-// Registers the enum utility generator to mlir-tblgen.
-static mlir::GenRegistration
- genSPIRVEnumDecls("gen-spirv-enum-avail-decls",
- "Generate SPIR-V enum availability declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPRIVEnumDecls(records, os);
- });
-
-// Registers the enum utility generator to mlir-tblgen.
-static mlir::GenRegistration
- genSPIRVEnumDefs("gen-spirv-enum-avail-defs",
- "Generate SPIR-V enum availability definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVEnumDefs(records, os);
- });
-
//===----------------------------------------------------------------------===//
// Serialization AutoGen
//===----------------------------------------------------------------------===//
@@ -1227,17 +1187,6 @@ static bool emitSPIRVSerializationFns(const RecordKeeper &records,
return false;
}
-//===----------------------------------------------------------------------===//
-// Serialization Hook Registration
-//===----------------------------------------------------------------------===//
-
-static mlir::GenRegistration genSPIRVSerialization(
- "gen-spirv-serialization",
- "Generate SPIR-V (de)serialization utilities and functions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVSerializationFns(records, os);
- });
-
//===----------------------------------------------------------------------===//
// Op Utils AutoGen
//===----------------------------------------------------------------------===//
@@ -1274,17 +1223,6 @@ static bool emitSPIRVAttrUtils(const RecordKeeper &records, raw_ostream &os) {
return false;
}
-//===----------------------------------------------------------------------===//
-// Op Utils Hook Registration
-//===----------------------------------------------------------------------===//
-
-static mlir::GenRegistration
- genSPIRVAttrUtils("gen-spirv-attr-utils",
- "Generate SPIR-V attribute utility definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVAttrUtils(records, os);
- });
-
//===----------------------------------------------------------------------===//
// SPIR-V Availability Impl AutoGen
//===----------------------------------------------------------------------===//
@@ -1417,17 +1355,6 @@ static bool emitSPIRVAvailabilityImpl(const RecordKeeper &records,
return false;
}
-//===----------------------------------------------------------------------===//
-// Op Availability Implementation Hook Registration
-//===----------------------------------------------------------------------===//
-
-static mlir::GenRegistration
- genSPIRVAvailabilityImpl("gen-spirv-avail-impls",
- "Generate SPIR-V operation utility definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVAvailabilityImpl(records, os);
- });
-
//===----------------------------------------------------------------------===//
// SPIR-V Capability Implication AutoGen
//===----------------------------------------------------------------------===//
@@ -1464,15 +1391,3 @@ static bool emitSPIRVCapabilityImplication(const RecordKeeper &records,
return false;
}
-
-//===----------------------------------------------------------------------===//
-// SPIR-V Capability Implication Hook Registration
-//===----------------------------------------------------------------------===//
-
-static mlir::GenRegistration genSPIRVCapabilityImplication(
- "gen-spirv-capability-implication",
- "Generate utility function to return implied "
- "capabilities for a given capability",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVCapabilityImplication(records, os);
- });
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 6c4b619598eb63..a338674f3ff6fb 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -12,11 +12,417 @@
#include "mlir/TableGen/GenInfo.h"
#include "mlir/Tools/mlir-tblgen/MlirTblgenMain.h"
+
+#include "llvm/Support/CommandLine.h"
#include "llvm/TableGen/Record.h"
using namespace llvm;
using namespace mlir;
+//===----------------------------------------------------------------------===//
+// AttrDef registration hooks
+//===----------------------------------------------------------------------===//
+
+static llvm::cl::OptionCategory attrdefGenCat("Options for -gen-attrdef-*");
+static llvm::cl::opt<std::string>
+ attrDialect("attrdefs-dialect",
+ llvm::cl::desc("Generate attributes for this dialect"),
+ llvm::cl::cat(attrdefGenCat), llvm::cl::CommaSeparated);
+
+static mlir::GenRegistration
+ genAttrDefs("gen-attrdef-defs", "Generate AttrDef definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ AttrDefGenerator generator(records, os);
+ return generator.emitDefs(attrDialect);
+ });
+static mlir::GenRegistration
+ genAttrDecls("gen-attrdef-decls", "Generate AttrDef declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ AttrDefGenerator generator(records, os);
+ return generator.emitDecls(attrDialect);
+ });
+
+//===----------------------------------------------------------------------===//
+// TypeDef registration hooks
+//===----------------------------------------------------------------------===//
+
+static llvm::cl::OptionCategory typedefGenCat("Options for -gen-typedef-*");
+static llvm::cl::opt<std::string>
+ typeDialect("typedefs-dialect",
+ llvm::cl::desc("Generate types for this dialect"),
+ llvm::cl::cat(typedefGenCat), llvm::cl::CommaSeparated);
+
+static mlir::GenRegistration
+ genTypeDefs("gen-typedef-defs", "Generate TypeDef definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ TypeDefGenerator generator(records, os);
+ return generator.emitDefs(typeDialect);
+ });
+static mlir::GenRegistration
+ genTypeDecls("gen-typedef-decls", "Generate TypeDef declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ TypeDefGenerator generator(records, os);
+ return generator.emitDecls(typeDialect);
+ });
+
+static mlir::GenRegistration
+ genTypeConstrDefs("gen-type-constraint-defs",
+ "Generate type constraint definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitTypeConstraintDefs(records, os);
+ return false;
+ });
+static mlir::GenRegistration
+ genTypeConstrDecls("gen-type-constraint-decls",
+ "Generate type constraint declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitTypeConstraintDecls(records, os);
+ return false;
+ });
+
+//===----------------------------------------------------------------------===//
+// Bytecode registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genBCRW("gen-bytecode", "Generate dialect bytecode readers/writers",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitBCRW(records, os);
+ });
+
+//===----------------------------------------------------------------------===//
+// GEN: Dialect registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genDialectDecls("gen-dialect-decls", "Generate dialect declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitDialectDecls(records, os);
+ });
+
+static mlir::GenRegistration
+ genDialectDefs("gen-dialect-defs", "Generate dialect definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitDialectDefs(records, os);
+ });
+
+//===----------------------------------------------------------------------===//
+// Directive registration hooks
+//===----------------------------------------------------------------------===//
+
+static llvm::cl::OptionCategory
+ directiveGenCat("Options for gen-directive-decl");
+static llvm::cl::opt<std::string>
+ dialect("directives-dialect",
+ llvm::cl::desc("Generate directives for this dialect"),
+ llvm::cl::cat(directiveGenCat), llvm::cl::CommaSeparated);
+
+// Registers the generator to mlir-tblgen.
+static mlir::GenRegistration genDirectiveDecls(
+ "gen-directive-decl",
+ "Generate declarations for directives (OpenMP/OpenACC etc.)",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitDirectiveDecls(records, dialect, os);
+ });
+
+//===----------------------------------------------------------------------===//
+// Python Enum registration hooks
+//===----------------------------------------------------------------------===//
+
+// Registers the enum utility generator to mlir-tblgen.
+static mlir::GenRegistration
+ genPythonEnumBindings("gen-python-enum-bindings",
+ "Generate Python bindings for enum attributes",
+ &emitPythonEnums);
+
+//===----------------------------------------------------------------------===//
+// Enum registration hooks
+//===----------------------------------------------------------------------===//
+
+// Registers the enum utility generator to mlir-tblgen.
+static mlir::GenRegistration
+ genEnumDecls("gen-enum-decls", "Generate enum utility declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitEnumDecls(records, os);
+ });
+
+// Registers the enum utility generator to mlir-tblgen.
+static mlir::GenRegistration
+ genEnumDefs("gen-enum-defs", "Generate enum utility definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitEnumDefs(records, os);
+ });
+
+//===----------------------------------------------------------------------===//
+// LLVMIR registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genLLVMIRConversions("gen-llvmir-conversions",
+ "Generate LLVM IR conversions",
+ emitLLVMIRConversionBuilders);
+
+static mlir::GenRegistration genOpFromLLVMIRConversions(
+ "gen-op-from-llvmir-conversions",
+ "Generate conversions of operations from LLVM IR",
+ emitLLVMIROpMLIRBuilders);
+
+static mlir::GenRegistration genIntrFromLLVMIRConversions(
+ "gen-intr-from-llvmir-conversions",
+ "Generate conversions of intrinsics from LLVM IR",
+ emitLLVMIRIntrMLIRBuilders);
+
+static mlir::GenRegistration
+ genEnumToLLVMConversion("gen-enum-to-llvmir-conversions",
+ "Generate conversions of EnumAttrs to LLVM IR",
+ emitLLVMIREnumConversionDefs</*ConvertTo=*/true>);
+
+static mlir::GenRegistration genEnumFromLLVMConversion(
+ "gen-enum-from-llvmir-conversions",
+ "Generate conversions of EnumAttrs from LLVM IR",
+ emitLLVMIREnumConversionDefs</*ConvertTo=*/false>);
+
+static mlir::GenRegistration genConvertibleLLVMIRIntrinsics(
+ "gen-convertible-llvmir-intrinsics",
+ "Generate list of convertible LLVM IR intrinsics",
+ emitConvertibleLLVMIRIntrinsics);
+
+static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
+ "Generate LLVM IR intrinsics",
+ emitLLVMIRIntrinsics);
+
+//===----------------------------------------------------------------------===//
+// OpenMP registration hooks
+//===----------------------------------------------------------------------===//
+
+// Registers the generator to mlir-tblgen.
+static mlir::GenRegistration
+ verifyOpenmpOps("verify-openmp-ops",
+ "Verify OpenMP operations (produce no output file)",
+ verifyOpenmpDecls);
+
+static mlir::GenRegistration
+ regOpenmpClauseOps("gen-openmp-clause-ops",
+ "Generate OpenMP clause operand structures",
+ genOpenmpClauseOps);
+
+//===----------------------------------------------------------------------===//
+// OpDefinition registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genOpDecls("gen-op-decls", "Generate op declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitOpDecls(records, os);
+ });
+
+static mlir::GenRegistration genOpDefs("gen-op-defs", "Generate op definitions",
+ [](const RecordKeeper &records,
+ raw_ostream &os) {
+ return emitOpDefs(records, os);
+ });
+//===----------------------------------------------------------------------===//
+// Op Doc Registration
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genAttrDocRegister("gen-attrdef-doc",
+ "Generate dialect attribute documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitAttrOrTypeDefDoc(records, os, "AttrDef");
+ return false;
+ });
+
+static mlir::GenRegistration
+ genOpDocRegister("gen-op-doc", "Generate dialect documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitOpDoc(records, os);
+ return false;
+ });
+
+static mlir::GenRegistration
+ genTypeDocRegister("gen-typedef-doc", "Generate dialect type documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitAttrOrTypeDefDoc(records, os, "TypeDef");
+ return false;
+ });
+
+static mlir::GenRegistration
+ genEnumDocRegister("gen-enum-doc", "Generate dialect enum documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitEnumDoc(records, os);
+ return false;
+ });
+
+static mlir::GenRegistration
+ genDialectDocRegister("gen-dialect-doc", "Generate dialect documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitDialectDoc(records, os);
+ });
+
+//===----------------------------------------------------------------------===//
+// Interface registration hooks
+//===----------------------------------------------------------------------===//
+
+namespace {
+template <typename GeneratorT>
+struct InterfaceGenRegistration {
+ InterfaceGenRegistration(StringRef genArg, StringRef genDesc)
+ : genDeclArg(("gen-" + genArg + "-interface-decls").str()),
+ genDefArg(("gen-" + genArg + "-interface-defs").str()),
+ genDocArg(("gen-" + genArg + "-interface-docs").str()),
+ genDeclDesc(("Generate " + genDesc + " interface declarations").str()),
+ genDefDesc(("Generate " + genDesc + " interface definitions").str()),
+ genDocDesc(("Generate " + genDesc + " interface documentation").str()),
+ genDecls(genDeclArg, genDeclDesc,
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return GeneratorT(records, os).emitInterfaceDecls();
+ }),
+ genDefs(genDefArg, genDefDesc,
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return GeneratorT(records, os).emitInterfaceDefs();
+ }),
+ genDocs(genDocArg, genDocDesc,
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return GeneratorT(records, os).emitInterfaceDocs();
+ }) {}
+
+ std::string genDeclArg, genDefArg, genDocArg;
+ std::string genDeclDesc, genDefDesc, genDocDesc;
+ mlir::GenRegistration genDecls, genDefs, genDocs;
+};
+} // namespace
+
+static InterfaceGenRegistration<AttrInterfaceGenerator>
+ attrInterfaceGen("attr", "attribute");
+static InterfaceGenRegistration<OpInterfaceGenerator> opInterfaceGen("op",
+ "op");
+static InterfaceGenRegistration<TypeInterfaceGenerator>
+ typeInterfaceGen("type", "type");
+
+//===----------------------------------------------------------------------===//
+// Python bindings registration hooks
+//===----------------------------------------------------------------------===//
+
+static GenRegistration
+ genPythonBindings("gen-python-op-bindings",
+ "Generate Python bindings for MLIR Ops",
+ &emitAllPythonOps);
+
+//===----------------------------------------------------------------------===//
+// Pass CAPI registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration genCAPIHeader("gen-pass-capi-header",
+ "Generate pass C API header",
+ &emitCAPIHeader);
+
+static mlir::GenRegistration genCAPIImpl("gen-pass-capi-impl",
+ "Generate pass C API implementation",
+ &emitCAPIImpl);
+
+//===----------------------------------------------------------------------===//
+// Pass Doc registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genPassDocRegister("gen-pass-doc", "Generate pass documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitPassDocs(records, os);
+ return false;
+ });
+
+//===----------------------------------------------------------------------===//
+// Pass registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genPassDecls("gen-pass-decls", "Generate pass declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitPassDecls(records, os);
+ return false;
+ });
+
+//===----------------------------------------------------------------------===//
+// Rewriter registration hooks
+//===----------------------------------------------------------------------===//
+
+static mlir::GenRegistration
+ genRewriters("gen-rewriters", "Generate pattern rewriters",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ emitRewriters(records, os);
+ return false;
+ });
+
+//===----------------------------------------------------------------------===//
+// SPIRV registration hooks
+//===----------------------------------------------------------------------===//
+
+// Registers the operation interface generator to mlir-tblgen.
+static mlir::GenRegistration
+ genSPIRVInterfaceDecls("gen-avail-interface-decls",
+ "Generate availability interface declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPRIVInterfaceDecls(records, os);
+ });
+
+// Registers the operation interface generator to mlir-tblgen.
+static mlir::GenRegistration
+ genSPIRVInterfaceDefs("gen-avail-interface-defs",
+ "Generate op interface definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPRIVInterfaceDefs(records, os);
+ });
+
+// Registers the enum utility generator to mlir-tblgen.
+static mlir::GenRegistration
+ genSPIRVEnumDecls("gen-spirv-enum-avail-decls",
+ "Generate SPIR-V enum availability declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPRIVEnumDecls(records, os);
+ });
+
+// Registers the enum utility generator to mlir-tblgen.
+static mlir::GenRegistration
+ genSPIRVEnumDefs("gen-spirv-enum-avail-defs",
+ "Generate SPIR-V enum availability definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVEnumDefs(records, os);
+ });
+
+static mlir::GenRegistration genSPIRVSerialization(
+ "gen-spirv-serialization",
+ "Generate SPIR-V (de)serialization utilities and functions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVSerializationFns(records, os);
+ });
+
+static mlir::GenRegistration
+ genSPIRVAttrUtils("gen-spirv-attr-utils",
+ "Generate SPIR-V attribute utility definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVAttrUtils(records, os);
+ });
+
+static mlir::GenRegistration
+ genSPIRVAvailabilityImpl("gen-spirv-avail-impls",
+ "Generate SPIR-V operation utility definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVAvailabilityImpl(records, os);
+ });
+
+static mlir::GenRegistration genSPIRVCapabilityImplication(
+ "gen-spirv-capability-implication",
+ "Generate utility function to return implied "
+ "capabilities for a given capability",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return emitSPIRVCapabilityImplication(records, os);
+ });
+
+//===----------------------------------------------------------------------===//
+// main registration hooks
+//===----------------------------------------------------------------------===//
+
// Generator that prints records.
GenRegistration printRecords("print-records", "Print all records to stdout",
[](const RecordKeeper &records, raw_ostream &os) {
>From 93d33fa80fae9a672a659f79fa97e24b62af34b9 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 17:45:25 -0400
Subject: [PATCH 05/24] remove anon namespaces
---
mlir/lib/TableGen/AttrOrTypeDefGen.cpp | 8 ++---
mlir/lib/TableGen/AttrOrTypeFormatGen.cpp | 14 ++++-----
mlir/lib/TableGen/BytecodeDialectGen.cpp | 38 ++++++++++++-----------
mlir/lib/TableGen/DialectGen.cpp | 4 +--
mlir/lib/TableGen/LLVMIRConversionGen.cpp | 22 ++++++-------
mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp | 6 ++--
mlir/lib/TableGen/OpDefinitionsGen.cpp | 12 +++----
mlir/lib/TableGen/OpFormatGen.cpp | 24 +++++++-------
mlir/lib/TableGen/OpInterfacesGen.cpp | 5 +--
mlir/lib/TableGen/Predicate.cpp | 8 ++---
mlir/lib/TableGen/RewriterGen.cpp | 4 +--
mlir/lib/TableGen/SPIRVUtilsGen.cpp | 4 +--
12 files changed, 76 insertions(+), 73 deletions(-)
diff --git a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
index ff80752e5a0b32..44100629fb3edf 100644
--- a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
@@ -62,7 +62,7 @@ static void collectAllDefs(StringRef selectedDialect,
// DefGen
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
class DefGen {
public:
/// Create the attribute or type class.
@@ -170,7 +170,7 @@ class DefGen {
/// The prefix/suffix of the TableGen def name, either "Attr" or "Type".
StringRef defType;
};
-} // namespace
+} // namespace mlir::tblgen
DefGen::DefGen(const AttrOrTypeDef &def)
: def(def), params(def.getParameters()), defCls(def.getCppClassName()),
@@ -684,7 +684,7 @@ void DefGen::emitStorageClass() {
// DefGenerator
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
/// This struct is the base generator used when processing tablegen interfaces.
class DefGenerator {
public:
@@ -733,7 +733,7 @@ struct TypeDefGenerator : public DefGenerator {
: DefGenerator(records.getAllDerivedDefinitionsIfDefined("TypeDef"), os,
"Type", "Type", /*isAttrGenerator=*/false) {}
};
-} // namespace
+} // namespace mlir::tblgen
//===----------------------------------------------------------------------===//
// GEN: Declarations
diff --git a/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
index a7d61801cbcf96..2cdacf05639cca 100644
--- a/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
@@ -7,10 +7,10 @@
//===----------------------------------------------------------------------===//
#include "mlir/TableGen/AttrOrTypeFormatGen.h"
-#include "mlir/TableGen/FormatGen.h"
#include "mlir/Support/LLVM.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Format.h"
+#include "mlir/TableGen/FormatGen.h"
#include "mlir/TableGen/GenInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/StringExtras.h"
@@ -31,7 +31,7 @@ using llvm::formatv;
// Element
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
/// This class represents an instance of a variable element. A variable refers
/// to an attribute or type parameter.
class ParameterElement
@@ -131,7 +131,7 @@ class StructDirective : public ParamsDirectiveBase<DirectiveElement::Struct> {
using Base::Base;
};
-} // namespace
+} // namespace mlir::tblgen
//===----------------------------------------------------------------------===//
// Format Strings
@@ -177,7 +177,7 @@ if (::mlir::failed(_result_{0})) {{
// DefFormat
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
class DefFormat {
public:
DefFormat(const AttrOrTypeDef &def, std::vector<FormatElement *> &&elements)
@@ -242,7 +242,7 @@ class DefFormat {
bool shouldEmitSpace = false;
bool lastWasPunctuation = false;
};
-} // namespace
+} // namespace mlir::tblgen
//===----------------------------------------------------------------------===//
// ParserGen
@@ -939,7 +939,7 @@ void DefFormat::genWhitespacePrinter(WhitespaceElement *el, FmtContext &ctx,
// DefFormatParser
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
class DefFormatParser : public FormatParser {
public:
DefFormatParser(llvm::SourceMgr &mgr, const AttrOrTypeDef &def)
@@ -982,7 +982,7 @@ class DefFormatParser : public FormatParser {
/// Seen attribute or type parameters.
BitVector seenParams;
};
-} // namespace
+} // namespace mlir::tblgen
LogicalResult DefFormatParser::verify(SMLoc loc,
ArrayRef<FormatElement *> elements) {
diff --git a/mlir/lib/TableGen/BytecodeDialectGen.cpp b/mlir/lib/TableGen/BytecodeDialectGen.cpp
index c48f93f6987037..d0e5bcce075dec 100644
--- a/mlir/lib/TableGen/BytecodeDialectGen.cpp
+++ b/mlir/lib/TableGen/BytecodeDialectGen.cpp
@@ -23,7 +23,7 @@ static cl::opt<std::string>
selectedBcDialect("bytecode-dialect", cl::desc("The dialect to gen for"),
cl::cat(dialectGenCat), cl::CommaSeparated);
-namespace {
+namespace mlir::tblgen {
/// Helper class to generate C++ bytecode parser helpers.
class Generator {
@@ -57,7 +57,7 @@ class Generator {
raw_ostream &output;
};
-} // namespace
+} // namespace mlir::tblgen
/// Helper to replace set of from strings to target in `s`.
/// Assumed: non-overlapping replacements.
@@ -93,8 +93,8 @@ static std::string getCType(const Record *def) {
return formatv(format.c_str(), cType.str());
}
-void Generator::emitParseDispatch(StringRef kind,
- ArrayRef<const Record *> vec) {
+void mlir::tblgen::Generator::emitParseDispatch(StringRef kind,
+ ArrayRef<const Record *> vec) {
mlir::raw_indented_ostream os(output);
char const *head =
R"(static {0} read{0}(MLIRContext* context, DialectBytecodeReader &reader))";
@@ -128,7 +128,7 @@ void Generator::emitParseDispatch(StringRef kind,
os << "return " << capitalize(kind) << "();\n";
}
-void Generator::emitParse(StringRef kind, const Record &x) {
+void mlir::tblgen::Generator::emitParse(StringRef kind, const Record &x) {
if (x.getNameInitAsString() == "ReservedOrDead")
return;
@@ -198,11 +198,10 @@ void printParseConditional(mlir::raw_indented_ostream &ios,
[&]() { ios << " &&\n"; });
}
-void Generator::emitParseHelper(StringRef kind, StringRef returnType,
- StringRef builder, ArrayRef<const Init *> args,
- ArrayRef<std::string> argNames,
- StringRef failure,
- mlir::raw_indented_ostream &ios) {
+void mlir::tblgen::Generator::emitParseHelper(
+ StringRef kind, StringRef returnType, StringRef builder,
+ ArrayRef<const Init *> args, ArrayRef<std::string> argNames,
+ StringRef failure, mlir::raw_indented_ostream &ios) {
auto funScope = ios.scope("{\n", "}");
if (args.empty()) {
@@ -296,8 +295,9 @@ void Generator::emitParseHelper(StringRef kind, StringRef returnType,
ios << "}\nreturn " << failure << ";\n";
}
-void Generator::emitPrint(StringRef kind, StringRef type,
- ArrayRef<std::pair<int64_t, const Record *>> vec) {
+void mlir::tblgen::Generator::emitPrint(
+ StringRef kind, StringRef type,
+ ArrayRef<std::pair<int64_t, const Record *>> vec) {
if (type == "ReservedOrDead")
return;
@@ -348,9 +348,10 @@ void Generator::emitPrint(StringRef kind, StringRef type,
}
}
-void Generator::emitPrintHelper(const Record *memberRec, StringRef kind,
- StringRef parent, StringRef name,
- mlir::raw_indented_ostream &ios) {
+void mlir::tblgen::Generator::emitPrintHelper(const Record *memberRec,
+ StringRef kind, StringRef parent,
+ StringRef name,
+ mlir::raw_indented_ostream &ios) {
std::string getter;
if (auto cGetter = memberRec->getValueAsOptionalString("cGetter");
cGetter && !cGetter->empty()) {
@@ -403,7 +404,8 @@ void Generator::emitPrintHelper(const Record *memberRec, StringRef kind,
<< ";\n";
}
-void Generator::emitPrintDispatch(StringRef kind, ArrayRef<std::string> vec) {
+void mlir::tblgen::Generator::emitPrintDispatch(StringRef kind,
+ ArrayRef<std::string> vec) {
mlir::raw_indented_ostream os(output);
char const *head = R"(static LogicalResult write{0}({0} {1},
DialectBytecodeWriter &writer))";
@@ -424,12 +426,11 @@ void Generator::emitPrintDispatch(StringRef kind, ArrayRef<std::string> vec) {
os << "\n.Default([&](" << capitalize(kind) << ") { return failure(); });\n";
}
-namespace {
+namespace mlir::tblgen {
/// Container of Attribute or Type for Dialect.
struct AttrOrType {
std::vector<const Record *> attr, type;
};
-} // namespace
static bool emitBCRW(const RecordKeeper &records, raw_ostream &os) {
MapVector<StringRef, AttrOrType> dialectAttrOrType;
@@ -484,3 +485,4 @@ static bool emitBCRW(const RecordKeeper &records, raw_ostream &os) {
return false;
}
+} // namespace mlir::tblgen
diff --git a/mlir/lib/TableGen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
index a03ce4a404c9ee..33ede2a3208263 100644
--- a/mlir/lib/TableGen/DialectGen.cpp
+++ b/mlir/lib/TableGen/DialectGen.cpp
@@ -39,11 +39,11 @@ llvm::cl::opt<std::string>
llvm::cl::cat(dialectGenCat), llvm::cl::CommaSeparated);
/// Utility iterator used for filtering records for a specific dialect.
-namespace {
+namespace mlir::tblgen {
using DialectFilterIterator =
llvm::filter_iterator<ArrayRef<Record *>::iterator,
std::function<bool(const Record *)>>;
-} // namespace
+} // namespace mlir::tblgen
static void populateDiscardableAttributes(
Dialect &dialect, const llvm::DagInit *discardableAttrDag,
diff --git a/mlir/lib/TableGen/LLVMIRConversionGen.cpp b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
index 2cbcb19e294fa7..5c6457450a8d08 100644
--- a/mlir/lib/TableGen/LLVMIRConversionGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
@@ -33,7 +33,7 @@ static LogicalResult emitError(const Record &record, const Twine &message) {
return failure();
}
-namespace {
+namespace mlir::tblgen {
// Helper structure to return a position of the substring in a string.
struct StringLoc {
size_t pos;
@@ -45,13 +45,13 @@ struct StringLoc {
// A location is invalid if its position is outside the string.
explicit operator bool() { return pos != std::string::npos; }
};
-} // namespace
+} // namespace mlir::tblgen
// Find the next TableGen variable in the given pattern. These variables start
// with a `$` character and can contain alphanumeric characters or underscores.
// Return the position of the variable in the pattern and its length, including
// the `$` character. The escape syntax `$$` is also detected and returned.
-static StringLoc findNextVariable(StringRef str) {
+static tblgen::StringLoc findNextVariable(StringRef str) {
size_t startPos = str.find('$');
if (startPos == std::string::npos)
return {startPos, 0};
@@ -130,7 +130,7 @@ static LogicalResult emitOneBuilder(const Record &record, raw_ostream &os) {
// to avoid re-traversing the string multiple times.
std::string builder;
llvm::raw_string_ostream bs(builder);
- while (StringLoc loc = findNextVariable(builderStrRef)) {
+ while (tblgen::StringLoc loc = findNextVariable(builderStrRef)) {
auto name = loc.in(builderStrRef).drop_front();
auto getterName = op.getGetterName(name);
// First, insert the non-matched part as is.
@@ -225,7 +225,7 @@ static LogicalResult emitOneMLIRBuilder(const Record &record, raw_ostream &os,
// the conversions fails.
std::string arguments, builder;
llvm::raw_string_ostream as(arguments), bs(builder);
- while (StringLoc loc = findNextVariable(builderStrRef)) {
+ while (tblgen::StringLoc loc = findNextVariable(builderStrRef)) {
auto name = loc.in(builderStrRef).drop_front();
// First, insert the non-matched part as is.
bs << builderStrRef.substr(0, loc.pos);
@@ -336,7 +336,7 @@ static bool emitLLVMIROpMLIRBuilders(const RecordKeeper &records,
return false;
}
-namespace {
+namespace mlir::tblgen {
// Wrapper class around a Tablegen definition of an LLVM enum attribute case.
class LLVMEnumAttrCase : public tblgen::EnumAttrCase {
public:
@@ -405,13 +405,13 @@ class LLVMCEnumAttr : public tblgen::EnumAttr {
return cases;
}
};
-} // namespace
+} // namespace mlir::tblgen
// Emits conversion function "LLVMClass convertEnumToLLVM(Enum)" and containing
// switch-based logic to convert from the MLIR LLVM dialect enum attribute case
// (Enum) to the corresponding LLVM API enumerant
static void emitOneEnumToConversion(const Record *record, raw_ostream &os) {
- LLVMEnumAttr enumAttr(record);
+ tblgen::LLVMEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
StringRef cppNamespace = enumAttr.getCppNamespace();
@@ -440,7 +440,7 @@ static void emitOneEnumToConversion(const Record *record, raw_ostream &os) {
// switch-based logic to convert from the MLIR LLVM dialect enum attribute case
// (Enum) to the corresponding LLVM API C-style enumerant
static void emitOneCEnumToConversion(const Record *record, raw_ostream &os) {
- LLVMCEnumAttr enumAttr(record);
+ tblgen::LLVMCEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
StringRef cppNamespace = enumAttr.getCppNamespace();
@@ -470,7 +470,7 @@ static void emitOneCEnumToConversion(const Record *record, raw_ostream &os) {
// containing switch-based logic to convert from the LLVM API enumerant to MLIR
// LLVM dialect enum attribute (Enum).
static void emitOneEnumFromConversion(const Record *record, raw_ostream &os) {
- LLVMEnumAttr enumAttr(record);
+ tblgen::LLVMEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
StringRef cppNamespace = enumAttr.getCppNamespace();
@@ -505,7 +505,7 @@ static void emitOneEnumFromConversion(const Record *record, raw_ostream &os) {
// containing switch-based logic to convert from the LLVM API C-style enumerant
// to MLIR LLVM dialect enum attribute (Enum).
static void emitOneCEnumFromConversion(const Record *record, raw_ostream &os) {
- LLVMCEnumAttr enumAttr(record);
+ tblgen::LLVMCEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
StringRef cppNamespace = enumAttr.getCppNamespace();
diff --git a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
index 3c9d71d8934b80..e1c95f05aab851 100644
--- a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
@@ -87,7 +87,7 @@ static IndicesTy getOverloadableTypeIdxs(const Record &record,
return overloadedOps;
}
-namespace {
+namespace mlir::tblgen {
/// A wrapper for LLVM's Tablegen class `Intrinsic` that provides accessors to
/// the fields of the record.
class LLVMIntrinsic {
@@ -187,7 +187,7 @@ class LLVMIntrinsic {
const Record &record;
};
-} // namespace
+} // namespace mlir::tblgen
/// Prints the elements in "range" separated by commas and surrounded by "[]".
template <typename Range>
@@ -200,7 +200,7 @@ void printBracketedRange(const Range &range, llvm::raw_ostream &os) {
/// Emits ODS (TableGen-based) code for `record` representing an LLVM intrinsic.
/// Returns true on error, false on success.
static bool emitIntrinsic(const Record &record, llvm::raw_ostream &os) {
- LLVMIntrinsic intr(record);
+ tblgen::LLVMIntrinsic intr(record);
Regex accessGroupMatcher(accessGroupRegexp);
bool requiresAccessGroup =
diff --git a/mlir/lib/TableGen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
index 1d0632247c306f..83e26d1377206e 100644
--- a/mlir/lib/TableGen/OpDefinitionsGen.cpp
+++ b/mlir/lib/TableGen/OpDefinitionsGen.cpp
@@ -283,7 +283,7 @@ static std::string constBuildAttrFromParam(const tblgen::Attribute &attr,
return tgfmt(builderTemplate, &fctx, paramName).str();
}
-namespace {
+namespace mlir::tblgen {
/// Metadata on a registered attribute. Given that attributes are stored in
/// sorted order on operations, we can use information from ODS to deduce the
/// number of required attributes less and and greater than each attribute,
@@ -467,7 +467,7 @@ class OpOrAdaptorHelper {
unsigned numRequired;
};
-} // namespace
+} // namespace mlir::tblgen
void OpOrAdaptorHelper::computeAttrMetadata() {
// Enumerate the attribute names of this op, ensuring the attribute names are
@@ -579,7 +579,7 @@ void OpOrAdaptorHelper::computeAttrMetadata() {
// Op emitter
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
// Helper class to emit a record into the given output stream.
class OpEmitter {
using ConstArgument =
@@ -785,7 +785,7 @@ class OpEmitter {
OpOrAdaptorHelper emitHelper;
};
-} // namespace
+} // namespace mlir::tblgen
// Populate the format context `ctx` with substitutions of attributes, operands
// and results.
@@ -4037,7 +4037,7 @@ void OpEmitter::genOpAsmInterface() {
// OpOperandAdaptor emitter
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
// Helper class to emit Op operand adaptors to an output stream. Operand
// adaptors are wrappers around random access ranges that provide named operand
// getters identical to those defined in the Op.
@@ -4086,7 +4086,7 @@ class OpOperandAdaptorEmitter {
// Helper for emitting adaptor code.
OpOrAdaptorHelper emitHelper;
};
-} // namespace
+} // namespace mlir::tblgen
OpOperandAdaptorEmitter::OpOperandAdaptorEmitter(
const Operator &op,
diff --git a/mlir/lib/TableGen/OpFormatGen.cpp b/mlir/lib/TableGen/OpFormatGen.cpp
index 29a678d6a9dbd1..56c0e73034069f 100644
--- a/mlir/lib/TableGen/OpFormatGen.cpp
+++ b/mlir/lib/TableGen/OpFormatGen.cpp
@@ -7,11 +7,11 @@
//===----------------------------------------------------------------------===//
#include "mlir/TableGen/OpFormatGen.h"
-#include "mlir/TableGen/FormatGen.h"
-#include "mlir/TableGen/OpClass.h"
#include "mlir/Support/LLVM.h"
#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/Format.h"
+#include "mlir/TableGen/FormatGen.h"
+#include "mlir/TableGen/OpClass.h"
#include "mlir/TableGen/Operator.h"
#include "mlir/TableGen/Trait.h"
#include "llvm/ADT/MapVector.h"
@@ -35,7 +35,7 @@ using llvm::StringMap;
//===----------------------------------------------------------------------===//
// VariableElement
-namespace {
+namespace mlir::tblgen {
/// This class represents an instance of an op variable element. A variable
/// refers to something registered on the operation itself, e.g. an operand,
/// result, attribute, region, or successor.
@@ -132,12 +132,12 @@ struct AttributeLikeVariable : public VariableElement {
llvm_unreachable("Type that wasn't listed in classof()");
}
};
-} // namespace
+} // namespace mlir::tblgen
//===----------------------------------------------------------------------===//
// DirectiveElement
-namespace {
+namespace mlir::tblgen {
/// This class represents the `operands` directive. This directive represents
/// all of the operands of an operation.
using OperandsDirective = DirectiveElementBase<DirectiveElement::Operands>;
@@ -280,13 +280,13 @@ class OIListElement : public DirectiveElementBase<DirectiveElement::OIList> {
/// ```
std::vector<std::vector<FormatElement *>> parsingElements;
};
-} // namespace
+} // namespace mlir::tblgen
//===----------------------------------------------------------------------===//
// OperationFormat
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
using ConstArgument =
llvm::PointerUnion<const NamedAttribute *, const NamedTypeConstraint *>;
@@ -417,7 +417,7 @@ struct OperationFormat {
/// The set of properties explicitly used within the format.
llvm::SmallSetVector<const NamedProperty *, 8> usedProperties;
};
-} // namespace
+} // namespace mlir::tblgen
//===----------------------------------------------------------------------===//
// Parser Gen
@@ -777,7 +777,7 @@ const char *oilistParserCode = R"(
{0}Clause = true;
)";
-namespace {
+namespace mlir::tblgen {
/// The type of length for a given parse argument.
enum class ArgumentLengthKind {
/// The argument is a variadic of a variadic, and may contain 0->N range
@@ -790,7 +790,7 @@ enum class ArgumentLengthKind {
/// The argument is a single element, i.e. always represents 1 element.
Single
};
-} // namespace
+} // namespace mlir::tblgen
/// Get the length kind for the given constraint.
static ArgumentLengthKind
@@ -2656,7 +2656,7 @@ static auto findArg(RangeT &&range, StringRef name) {
return it != range.end() ? &*it : nullptr;
}
-namespace {
+namespace mlir::tblgen {
/// This class implements a parser for an instance of an operation assembly
/// format.
class OpFormatParser : public FormatParser {
@@ -2784,7 +2784,7 @@ class OpFormatParser : public FormatParser {
llvm::DenseSet<const NamedSuccessor *> seenSuccessors;
llvm::SmallSetVector<const NamedProperty *, 8> seenProperties;
};
-} // namespace
+} // namespace mlir::tblgen
LogicalResult OpFormatParser::verify(SMLoc loc,
ArrayRef<FormatElement *> elements) {
diff --git a/mlir/lib/TableGen/OpInterfacesGen.cpp b/mlir/lib/TableGen/OpInterfacesGen.cpp
index e2cf18e0318e13..370de62b90a01f 100644
--- a/mlir/lib/TableGen/OpInterfacesGen.cpp
+++ b/mlir/lib/TableGen/OpInterfacesGen.cpp
@@ -80,7 +80,7 @@ getAllInterfaceDefinitions(const RecordKeeper &records, StringRef name) {
return defs;
}
-namespace {
+namespace mlir::tblgen {
/// This struct is the base generator used when processing tablegen interfaces.
class InterfaceGenerator {
public:
@@ -163,7 +163,6 @@ struct TypeInterfaceGenerator : public InterfaceGenerator {
extraDeclsFmt.addSubst(substVar, "(*this)");
}
};
-} // namespace
//===----------------------------------------------------------------------===//
// GEN: Interface definitions
@@ -669,3 +668,5 @@ bool InterfaceGenerator::emitInterfaceDocs() {
emitInterfaceDoc(*def, os);
return false;
}
+
+} // namespace mlir::tblgen
diff --git a/mlir/lib/TableGen/Predicate.cpp b/mlir/lib/TableGen/Predicate.cpp
index f71dd0bd35f86c..282bcf121144e7 100644
--- a/mlir/lib/TableGen/Predicate.cpp
+++ b/mlir/lib/TableGen/Predicate.cpp
@@ -88,7 +88,7 @@ std::vector<const Record *> CombinedPred::getChildren() const {
return def->getValueAsListOfDefs("children");
}
-namespace {
+namespace mlir::tblgen {
// Kinds of nodes in a logical predicate tree.
enum class PredCombinerKind {
Leaf,
@@ -113,7 +113,7 @@ struct PredNode {
std::string prefix;
std::string suffix;
};
-} // namespace
+} // namespace mlir::tblgen
// Get a predicate tree node kind based on the kind used in the predicate
// TableGen record.
@@ -131,10 +131,10 @@ static PredCombinerKind getPredCombinerKind(const Pred &pred) {
.Case("PredCombinerConcat", PredCombinerKind::Concat);
}
-namespace {
+namespace mlir::tblgen {
// Substitution<pattern, replacement>.
using Subst = std::pair<StringRef, StringRef>;
-} // namespace
+} // namespace mlir::tblgen
/// Perform the given substitutions on 'str' in-place.
static void performSubstitutions(std::string &str,
diff --git a/mlir/lib/TableGen/RewriterGen.cpp b/mlir/lib/TableGen/RewriterGen.cpp
index 449dfce7f16b82..a4e47fe59123ab 100644
--- a/mlir/lib/TableGen/RewriterGen.cpp
+++ b/mlir/lib/TableGen/RewriterGen.cpp
@@ -58,7 +58,7 @@ struct format_provider<mlir::tblgen::Pattern::IdentifierLine> {
// PatternEmitter
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
class StaticMatcherHelper;
@@ -345,7 +345,7 @@ class StaticMatcherHelper {
StaticVerifierFunctionEmitter staticVerifierEmitter;
};
-} // namespace
+} // namespace mlir::tblgen
PatternEmitter::PatternEmitter(const Record *pat, RecordOperatorMap *mapper,
raw_ostream &os, StaticMatcherHelper &helper)
diff --git a/mlir/lib/TableGen/SPIRVUtilsGen.cpp b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
index 18f6fbd389178b..799220dedceeb7 100644
--- a/mlir/lib/TableGen/SPIRVUtilsGen.cpp
+++ b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
@@ -54,7 +54,7 @@ using mlir::tblgen::Operator;
// Availability Wrapper Class
//===----------------------------------------------------------------------===//
-namespace {
+namespace mlir::tblgen {
// Wrapper class with helper methods for accessing availability defined in
// TableGen.
class Availability {
@@ -104,7 +104,6 @@ class Availability {
// The TableGen definition of this availability.
const Record *def;
};
-} // namespace
Availability::Availability(const Record *def) : def(def) {
assert(def->isSubClassOf("Availability") &&
@@ -1391,3 +1390,4 @@ static bool emitSPIRVCapabilityImplication(const RecordKeeper &records,
return false;
}
+} // namespace mlir::tblgen
>From c94a76a98b2823903cc464cc5bd0de25f77cc36a Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 17:56:50 -0400
Subject: [PATCH 06/24] expose AttrDefGenerator and TypeDefGenerator
---
mlir/include/mlir/TableGen/AttrOrTypeDef.h | 146 ++++++++++++++++
mlir/lib/TableGen/AttrOrTypeDefGen.cpp | 185 +++------------------
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 13 +-
3 files changed, 179 insertions(+), 165 deletions(-)
diff --git a/mlir/include/mlir/TableGen/AttrOrTypeDef.h b/mlir/include/mlir/TableGen/AttrOrTypeDef.h
index c3d730e42ef70e..38748bd35dc0b2 100644
--- a/mlir/include/mlir/TableGen/AttrOrTypeDef.h
+++ b/mlir/include/mlir/TableGen/AttrOrTypeDef.h
@@ -16,6 +16,7 @@
#include "mlir/Support/LLVM.h"
#include "mlir/TableGen/Builder.h"
+#include "mlir/TableGen/Class.h"
#include "mlir/TableGen/Constraint.h"
#include "mlir/TableGen/Trait.h"
@@ -27,6 +28,9 @@ class SMLoc;
namespace mlir {
namespace tblgen {
+class MethodParameter;
+class MethodParameter;
+class InterfaceMethod;
class Dialect;
//===----------------------------------------------------------------------===//
@@ -285,6 +289,148 @@ class TypeDef : public AttrOrTypeDef {
StringRef getTypeName() const;
};
+class DefGen {
+public:
+ /// Create the attribute or type class.
+ DefGen(const AttrOrTypeDef &def);
+
+ void emitDecl(raw_ostream &os) const;
+ void emitDef(raw_ostream &os) const;
+
+private:
+ /// Add traits from the TableGen definition to the class.
+ void createParentWithTraits();
+ /// Emit top-level declarations: using declarations and any extra class
+ /// declarations.
+ void emitTopLevelDeclarations();
+ /// Emit the function that returns the type or attribute name.
+ void emitName();
+ /// Emit the dialect name as a static member variable.
+ void emitDialectName();
+ /// Emit attribute or type builders.
+ void emitBuilders();
+ /// Emit a verifier declaration for custom verification (impl. provided by
+ /// the users).
+ void emitVerifierDecl();
+ /// Emit a verifier that checks type constraints.
+ void emitInvariantsVerifierImpl();
+ /// Emit an entry poiunt for verification that calls the invariants and
+ /// custom verifier.
+ void emitInvariantsVerifier(bool hasImpl, bool hasCustomVerifier);
+ /// Emit parsers and printers.
+ void emitParserPrinter();
+ /// Emit parameter accessors, if required.
+ void emitAccessors();
+ /// Emit interface methods.
+ void emitInterfaceMethods();
+
+ //===--------------------------------------------------------------------===//
+ // Builder Emission
+
+ /// Emit the default builder `Attribute::get`
+ void emitDefaultBuilder();
+ /// Emit the checked builder `Attribute::getChecked`
+ void emitCheckedBuilder();
+ /// Emit a custom builder.
+ void emitCustomBuilder(const AttrOrTypeBuilder &builder);
+ /// Emit a checked custom builder.
+ void emitCheckedCustomBuilder(const AttrOrTypeBuilder &builder);
+
+ //===--------------------------------------------------------------------===//
+ // Interface Method Emission
+
+ /// Emit methods for a trait.
+ void emitTraitMethods(const InterfaceTrait &trait);
+ /// Emit a trait method.
+ void emitTraitMethod(const InterfaceMethod &method);
+
+ //===--------------------------------------------------------------------===//
+ // Storage Class Emission
+ void emitStorageClass();
+ /// Generate the storage class constructor.
+ void emitStorageConstructor();
+ /// Emit the key type `KeyTy`.
+ void emitKeyType();
+ /// Emit the equality comparison operator.
+ void emitEquals();
+ /// Emit the key hash function.
+ void emitHashKey();
+ /// Emit the function to construct the storage class.
+ void emitConstruct();
+
+ //===--------------------------------------------------------------------===//
+ // Utility Function Declarations
+
+ /// Get the method parameters for a def builder, where the first several
+ /// parameters may be different.
+ SmallVector<MethodParameter>
+ getBuilderParams(std::initializer_list<MethodParameter> prefix) const;
+
+ //===--------------------------------------------------------------------===//
+ // Class fields
+
+ /// The attribute or type definition.
+ const AttrOrTypeDef &def;
+ /// The list of attribute or type parameters.
+ ArrayRef<AttrOrTypeParameter> params;
+ /// The attribute or type class.
+ Class defCls;
+ /// An optional attribute or type storage class. The storage class will
+ /// exist if and only if the def has more than zero parameters.
+ std::optional<Class> storageCls;
+
+ /// The C++ base value of the def, either "Attribute" or "Type".
+ StringRef valueType;
+ /// The prefix/suffix of the TableGen def name, either "Attr" or "Type".
+ StringRef defType;
+};
+
+class DefGenerator {
+public:
+ bool emitDecls(StringRef selectedDialect);
+ bool emitDefs(StringRef selectedDialect);
+
+protected:
+ DefGenerator(ArrayRef<const llvm::Record *> defs, raw_ostream &os,
+ StringRef defType, StringRef valueType, bool isAttrGenerator);
+
+ /// Emit the list of def type names.
+ void emitTypeDefList(ArrayRef<AttrOrTypeDef> defs);
+ /// Emit the code to dispatch between different defs during parsing/printing.
+ void emitParsePrintDispatch(ArrayRef<AttrOrTypeDef> defs);
+
+ /// The set of def records to emit.
+ std::vector<const llvm::Record *> defRecords;
+ /// The attribute or type class to emit.
+ /// The stream to emit to.
+ raw_ostream &os;
+ /// The prefix of the tablegen def name, e.g. Attr or Type.
+ StringRef defType;
+ /// The C++ base value type of the def, e.g. Attribute or Type.
+ StringRef valueType;
+ /// Flag indicating if this generator is for Attributes. False if the
+ /// generator is for types.
+ bool isAttrGenerator;
+};
+
+/// A specialized generator for AttrDefs.
+struct AttrDefGenerator : public DefGenerator {
+ AttrDefGenerator(const llvm::RecordKeeper &records, raw_ostream &os)
+ : DefGenerator(records.getAllDerivedDefinitionsIfDefined("AttrDef"), os,
+ "Attr", "Attribute", /*isAttrGenerator=*/true) {}
+};
+/// A specialized generator for TypeDefs.
+struct TypeDefGenerator : public DefGenerator {
+ TypeDefGenerator(const llvm::RecordKeeper &records, raw_ostream &os)
+ : DefGenerator(records.getAllDerivedDefinitionsIfDefined("TypeDef"), os,
+ "Type", "Type", /*isAttrGenerator=*/false) {}
+};
+
+void emitTypeConstraintDecls(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+void emitTypeConstraintDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
index 44100629fb3edf..238631f77f34c4 100644
--- a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
@@ -63,114 +63,20 @@ static void collectAllDefs(StringRef selectedDialect,
//===----------------------------------------------------------------------===//
namespace mlir::tblgen {
-class DefGen {
-public:
- /// Create the attribute or type class.
- DefGen(const AttrOrTypeDef &def);
-
- void emitDecl(raw_ostream &os) const {
- if (storageCls && def.genStorageClass()) {
- NamespaceEmitter ns(os, def.getStorageNamespace());
- os << "struct " << def.getStorageClassName() << ";\n";
- }
- defCls.writeDeclTo(os);
+void DefGen::emitDecl(raw_ostream &os) const {
+ if (storageCls && def.genStorageClass()) {
+ NamespaceEmitter ns(os, def.getStorageNamespace());
+ os << "struct " << def.getStorageClassName() << ";\n";
}
- void emitDef(raw_ostream &os) const {
- if (storageCls && def.genStorageClass()) {
- NamespaceEmitter ns(os, def.getStorageNamespace());
- storageCls->writeDeclTo(os); // everything is inline
- }
- defCls.writeDefTo(os);
+ defCls.writeDeclTo(os);
+}
+void DefGen::emitDef(raw_ostream &os) const {
+ if (storageCls && def.genStorageClass()) {
+ NamespaceEmitter ns(os, def.getStorageNamespace());
+ storageCls->writeDeclTo(os); // everything is inline
}
-
-private:
- /// Add traits from the TableGen definition to the class.
- void createParentWithTraits();
- /// Emit top-level declarations: using declarations and any extra class
- /// declarations.
- void emitTopLevelDeclarations();
- /// Emit the function that returns the type or attribute name.
- void emitName();
- /// Emit the dialect name as a static member variable.
- void emitDialectName();
- /// Emit attribute or type builders.
- void emitBuilders();
- /// Emit a verifier declaration for custom verification (impl. provided by
- /// the users).
- void emitVerifierDecl();
- /// Emit a verifier that checks type constraints.
- void emitInvariantsVerifierImpl();
- /// Emit an entry poiunt for verification that calls the invariants and
- /// custom verifier.
- void emitInvariantsVerifier(bool hasImpl, bool hasCustomVerifier);
- /// Emit parsers and printers.
- void emitParserPrinter();
- /// Emit parameter accessors, if required.
- void emitAccessors();
- /// Emit interface methods.
- void emitInterfaceMethods();
-
- //===--------------------------------------------------------------------===//
- // Builder Emission
-
- /// Emit the default builder `Attribute::get`
- void emitDefaultBuilder();
- /// Emit the checked builder `Attribute::getChecked`
- void emitCheckedBuilder();
- /// Emit a custom builder.
- void emitCustomBuilder(const AttrOrTypeBuilder &builder);
- /// Emit a checked custom builder.
- void emitCheckedCustomBuilder(const AttrOrTypeBuilder &builder);
-
- //===--------------------------------------------------------------------===//
- // Interface Method Emission
-
- /// Emit methods for a trait.
- void emitTraitMethods(const InterfaceTrait &trait);
- /// Emit a trait method.
- void emitTraitMethod(const InterfaceMethod &method);
-
- //===--------------------------------------------------------------------===//
- // Storage Class Emission
- void emitStorageClass();
- /// Generate the storage class constructor.
- void emitStorageConstructor();
- /// Emit the key type `KeyTy`.
- void emitKeyType();
- /// Emit the equality comparison operator.
- void emitEquals();
- /// Emit the key hash function.
- void emitHashKey();
- /// Emit the function to construct the storage class.
- void emitConstruct();
-
- //===--------------------------------------------------------------------===//
- // Utility Function Declarations
-
- /// Get the method parameters for a def builder, where the first several
- /// parameters may be different.
- SmallVector<MethodParameter>
- getBuilderParams(std::initializer_list<MethodParameter> prefix) const;
-
- //===--------------------------------------------------------------------===//
- // Class fields
-
- /// The attribute or type definition.
- const AttrOrTypeDef &def;
- /// The list of attribute or type parameters.
- ArrayRef<AttrOrTypeParameter> params;
- /// The attribute or type class.
- Class defCls;
- /// An optional attribute or type storage class. The storage class will
- /// exist if and only if the def has more than zero parameters.
- std::optional<Class> storageCls;
-
- /// The C++ base value of the def, either "Attribute" or "Type".
- StringRef valueType;
- /// The prefix/suffix of the TableGen def name, either "Attr" or "Type".
- StringRef defType;
-};
-} // namespace mlir::tblgen
+ defCls.writeDefTo(os);
+}
DefGen::DefGen(const AttrOrTypeDef &def)
: def(def), params(def.getParameters()), defCls(def.getCppClassName()),
@@ -684,56 +590,17 @@ void DefGen::emitStorageClass() {
// DefGenerator
//===----------------------------------------------------------------------===//
-namespace mlir::tblgen {
/// This struct is the base generator used when processing tablegen interfaces.
-class DefGenerator {
-public:
- bool emitDecls(StringRef selectedDialect);
- bool emitDefs(StringRef selectedDialect);
-
-protected:
- DefGenerator(ArrayRef<const Record *> defs, raw_ostream &os,
- StringRef defType, StringRef valueType, bool isAttrGenerator)
- : defRecords(defs), os(os), defType(defType), valueType(valueType),
- isAttrGenerator(isAttrGenerator) {
- // Sort by occurrence in file.
- llvm::sort(defRecords, [](const Record *lhs, const Record *rhs) {
- return lhs->getID() < rhs->getID();
- });
- }
-
- /// Emit the list of def type names.
- void emitTypeDefList(ArrayRef<AttrOrTypeDef> defs);
- /// Emit the code to dispatch between different defs during parsing/printing.
- void emitParsePrintDispatch(ArrayRef<AttrOrTypeDef> defs);
-
- /// The set of def records to emit.
- std::vector<const Record *> defRecords;
- /// The attribute or type class to emit.
- /// The stream to emit to.
- raw_ostream &os;
- /// The prefix of the tablegen def name, e.g. Attr or Type.
- StringRef defType;
- /// The C++ base value type of the def, e.g. Attribute or Type.
- StringRef valueType;
- /// Flag indicating if this generator is for Attributes. False if the
- /// generator is for types.
- bool isAttrGenerator;
-};
-
-/// A specialized generator for AttrDefs.
-struct AttrDefGenerator : public DefGenerator {
- AttrDefGenerator(const RecordKeeper &records, raw_ostream &os)
- : DefGenerator(records.getAllDerivedDefinitionsIfDefined("AttrDef"), os,
- "Attr", "Attribute", /*isAttrGenerator=*/true) {}
-};
-/// A specialized generator for TypeDefs.
-struct TypeDefGenerator : public DefGenerator {
- TypeDefGenerator(const RecordKeeper &records, raw_ostream &os)
- : DefGenerator(records.getAllDerivedDefinitionsIfDefined("TypeDef"), os,
- "Type", "Type", /*isAttrGenerator=*/false) {}
-};
-} // namespace mlir::tblgen
+DefGenerator::DefGenerator(ArrayRef<const Record *> defs, raw_ostream &os,
+ StringRef defType, StringRef valueType,
+ bool isAttrGenerator)
+ : defRecords(defs), os(os), defType(defType), valueType(valueType),
+ isAttrGenerator(isAttrGenerator) {
+ // Sort by occurrence in file.
+ llvm::sort(defRecords, [](const Record *lhs, const Record *rhs) {
+ return lhs->getID() < rhs->getID();
+ });
+}
//===----------------------------------------------------------------------===//
// GEN: Declarations
@@ -1048,8 +915,7 @@ getAllTypeConstraints(const RecordKeeper &records) {
return result;
}
-static void emitTypeConstraintDecls(const RecordKeeper &records,
- raw_ostream &os) {
+void emitTypeConstraintDecls(const RecordKeeper &records, raw_ostream &os) {
static const char *const typeConstraintDecl = R"(
bool {0}(::mlir::Type type);
)";
@@ -1058,8 +924,7 @@ bool {0}(::mlir::Type type);
os << strfmt(typeConstraintDecl, *constr.getCppFunctionName());
}
-static void emitTypeConstraintDefs(const RecordKeeper &records,
- raw_ostream &os) {
+void emitTypeConstraintDefs(const RecordKeeper &records, raw_ostream &os) {
static const char *const typeConstraintDef = R"(
bool {0}(::mlir::Type type) {
return ({1});
@@ -1073,3 +938,5 @@ bool {0}(::mlir::Type type) {
os << strfmt(typeConstraintDef, *constr.getCppFunctionName(), condition);
}
}
+
+} // namespace mlir::tblgen
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index a338674f3ff6fb..144c2f4225b8d8 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -10,6 +10,7 @@
//
//===----------------------------------------------------------------------===//
+#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/Tools/mlir-tblgen/MlirTblgenMain.h"
@@ -32,13 +33,13 @@ static llvm::cl::opt<std::string>
static mlir::GenRegistration
genAttrDefs("gen-attrdef-defs", "Generate AttrDef definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- AttrDefGenerator generator(records, os);
+ tblgen::AttrDefGenerator generator(records, os);
return generator.emitDefs(attrDialect);
});
static mlir::GenRegistration
genAttrDecls("gen-attrdef-decls", "Generate AttrDef declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- AttrDefGenerator generator(records, os);
+ tblgen::AttrDefGenerator generator(records, os);
return generator.emitDecls(attrDialect);
});
@@ -55,13 +56,13 @@ static llvm::cl::opt<std::string>
static mlir::GenRegistration
genTypeDefs("gen-typedef-defs", "Generate TypeDef definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- TypeDefGenerator generator(records, os);
+ tblgen::TypeDefGenerator generator(records, os);
return generator.emitDefs(typeDialect);
});
static mlir::GenRegistration
genTypeDecls("gen-typedef-decls", "Generate TypeDef declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- TypeDefGenerator generator(records, os);
+ tblgen::TypeDefGenerator generator(records, os);
return generator.emitDecls(typeDialect);
});
@@ -69,14 +70,14 @@ static mlir::GenRegistration
genTypeConstrDefs("gen-type-constraint-defs",
"Generate type constraint definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- emitTypeConstraintDefs(records, os);
+ tblgen::emitTypeConstraintDefs(records, os);
return false;
});
static mlir::GenRegistration
genTypeConstrDecls("gen-type-constraint-decls",
"Generate type constraint declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- emitTypeConstraintDecls(records, os);
+ tblgen::emitTypeConstraintDecls(records, os);
return false;
});
>From 9ecf9fd6250b492fb561d41ca5ba5064a81ca72a Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:04:00 -0400
Subject: [PATCH 07/24] expose bytecode
---
mlir/include/mlir/TableGen/Bytecode.h | 18 ++++++++++++++++++
mlir/lib/TableGen/BytecodeDialectGen.cpp | 3 ++-
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 4 +++-
3 files changed, 23 insertions(+), 2 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/Bytecode.h
diff --git a/mlir/include/mlir/TableGen/Bytecode.h b/mlir/include/mlir/TableGen/Bytecode.h
new file mode 100644
index 00000000000000..33a0b1466d4366
--- /dev/null
+++ b/mlir/include/mlir/TableGen/Bytecode.h
@@ -0,0 +1,18 @@
+//===-- Bytecode.h - Bytecode definitions -*- C++ -----------------------*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_BYTECODE_H
+#define MLIR_TABLEGEN_BYTECODE_H
+
+namespace llvm {
+class RecordKeeper;
+} // namespace llvm
+
+namespace mlir::tblgen {
+bool emitBCRW(const llvm::RecordKeeper &records, raw_ostream &os);
+} // namespace mlir::tblgen
+
+#endif // MLIR_TABLEGEN_BYTECODE_H
diff --git a/mlir/lib/TableGen/BytecodeDialectGen.cpp b/mlir/lib/TableGen/BytecodeDialectGen.cpp
index d0e5bcce075dec..726d9c8975493a 100644
--- a/mlir/lib/TableGen/BytecodeDialectGen.cpp
+++ b/mlir/lib/TableGen/BytecodeDialectGen.cpp
@@ -7,6 +7,7 @@
//===----------------------------------------------------------------------===//
#include "mlir/Support/IndentedOstream.h"
+#include "mlir/TableGen/Bytecode.h"
#include "mlir/TableGen/GenInfo.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/STLExtras.h"
@@ -432,7 +433,7 @@ struct AttrOrType {
std::vector<const Record *> attr, type;
};
-static bool emitBCRW(const RecordKeeper &records, raw_ostream &os) {
+bool emitBCRW(const RecordKeeper &records, raw_ostream &os) {
MapVector<StringRef, AttrOrType> dialectAttrOrType;
for (const Record *it :
records.getAllDerivedDefinitions("DialectAttributes")) {
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 144c2f4225b8d8..c23c40aba356ba 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -17,6 +17,8 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/TableGen/Record.h"
+#include <mlir/TableGen/Bytecode.h>
+
using namespace llvm;
using namespace mlir;
@@ -88,7 +90,7 @@ static mlir::GenRegistration
static mlir::GenRegistration
genBCRW("gen-bytecode", "Generate dialect bytecode readers/writers",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitBCRW(records, os);
+ return tblgen::emitBCRW(records, os);
});
//===----------------------------------------------------------------------===//
>From 6d5497864c5a9f1c5f6df3c66465414f69b716a8 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:07:01 -0400
Subject: [PATCH 08/24] expose dialect
---
mlir/include/mlir/TableGen/Dialect.h | 4 ++++
mlir/lib/TableGen/DialectGen.cpp | 4 ++--
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 4 ++--
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/mlir/include/mlir/TableGen/Dialect.h b/mlir/include/mlir/TableGen/Dialect.h
index ea8f40555e4451..4f5380d8bab1c7 100644
--- a/mlir/include/mlir/TableGen/Dialect.h
+++ b/mlir/include/mlir/TableGen/Dialect.h
@@ -112,6 +112,10 @@ class Dialect {
const llvm::Record *def;
std::vector<StringRef> dependentDialects;
};
+
+bool emitDialectDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitDialectDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
index 33ede2a3208263..5298f86e22e1f1 100644
--- a/mlir/lib/TableGen/DialectGen.cpp
+++ b/mlir/lib/TableGen/DialectGen.cpp
@@ -298,7 +298,7 @@ static void emitDialectDecl(Dialect &dialect, raw_ostream &os) {
<< "::" << dialect.getCppClassName() << ")\n";
}
-static bool emitDialectDecls(const RecordKeeper &records, raw_ostream &os) {
+bool emitDialectDecls(const RecordKeeper &records, raw_ostream &os) {
emitSourceFileHeader("Dialect Declarations", os, records);
auto dialectDefs = records.getAllDerivedDefinitions("Dialect");
@@ -390,7 +390,7 @@ static void emitDialectDef(Dialect &dialect, const RecordKeeper &records,
os << llvm::formatv(dialectDestructorStr, cppClassName);
}
-static bool emitDialectDefs(const RecordKeeper &records, raw_ostream &os) {
+bool emitDialectDefs(const RecordKeeper &records, raw_ostream &os) {
emitSourceFileHeader("Dialect Definitions", os, records);
auto dialectDefs = records.getAllDerivedDefinitions("Dialect");
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index c23c40aba356ba..bb722956d05f39 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -100,13 +100,13 @@ static mlir::GenRegistration
static mlir::GenRegistration
genDialectDecls("gen-dialect-decls", "Generate dialect declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDecls(records, os);
+ return tblgen::emitDialectDecls(records, os);
});
static mlir::GenRegistration
genDialectDefs("gen-dialect-defs", "Generate dialect definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDefs(records, os);
+ return tblgen::emitDialectDefs(records, os);
});
//===----------------------------------------------------------------------===//
>From bb301e1c0184b809a599065f0cc9c4c24ac0b94b Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:09:35 -0400
Subject: [PATCH 09/24] expose directives
---
mlir/include/mlir/TableGen/Directive.h | 25 ++++++++++++++++++++++++
mlir/lib/TableGen/DirectiveCommonGen.cpp | 6 ++++--
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 6 +++---
3 files changed, 32 insertions(+), 5 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/Directive.h
diff --git a/mlir/include/mlir/TableGen/Directive.h b/mlir/include/mlir/TableGen/Directive.h
new file mode 100644
index 00000000000000..27e537b0ce8529
--- /dev/null
+++ b/mlir/include/mlir/TableGen/Directive.h
@@ -0,0 +1,25 @@
+//===- Directive.h - Directive class --------------------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_DIRECTIVE_H_
+#define MLIR_TABLEGEN_DIRECTIVE_H_
+
+#include "mlir/Support/LLVM.h"
+#include "llvm/TableGen/Record.h"
+
+#include <string>
+#include <vector>
+
+namespace mlir {
+namespace tblgen {
+bool emitDirectiveDecls(const llvm::RecordKeeper &records,
+ llvm::StringRef dialect, raw_ostream &os);
+
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_DIRECTIVE_H_
diff --git a/mlir/lib/TableGen/DirectiveCommonGen.cpp b/mlir/lib/TableGen/DirectiveCommonGen.cpp
index 7d6a3688a63aa0..1fff4c1517ffbc 100644
--- a/mlir/lib/TableGen/DirectiveCommonGen.cpp
+++ b/mlir/lib/TableGen/DirectiveCommonGen.cpp
@@ -11,6 +11,7 @@
//
//===----------------------------------------------------------------------===//
+#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/GenInfo.h"
#include "llvm/ADT/Twine.h"
@@ -42,8 +43,9 @@ using llvm::RecordKeeper;
// Clause record in OMP.td. This name can be used to specify the type of the
// OpenMP operation's operand. The allowedClauseValues field provides the list
// of ClauseValues which are part of the enumeration.
-static bool emitDirectiveDecls(const RecordKeeper &records,
- llvm::StringRef dialect, raw_ostream &os) {
+bool mlir::tblgen::emitDirectiveDecls(const RecordKeeper &records,
+ llvm::StringRef dialect,
+ raw_ostream &os) {
// A dialect must be selected for the generated attributes.
if (dialect.empty()) {
llvm::PrintFatalError("a dialect must be selected for the directives via "
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index bb722956d05f39..0604aa1223eaab 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -11,14 +11,14 @@
//===----------------------------------------------------------------------===//
#include "mlir/TableGen/AttrOrTypeDef.h"
+#include "mlir/TableGen/Bytecode.h"
+#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/Tools/mlir-tblgen/MlirTblgenMain.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/TableGen/Record.h"
-#include <mlir/TableGen/Bytecode.h>
-
using namespace llvm;
using namespace mlir;
@@ -125,7 +125,7 @@ static mlir::GenRegistration genDirectiveDecls(
"gen-directive-decl",
"Generate declarations for directives (OpenMP/OpenACC etc.)",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitDirectiveDecls(records, dialect, os);
+ return tblgen::emitDirectiveDecls(records, dialect, os);
});
//===----------------------------------------------------------------------===//
>From 05073f1a860ec9d8bf1e4db9ec1b97b411d91589 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:17:06 -0400
Subject: [PATCH 10/24] expose python
---
mlir/include/mlir/TableGen/Python.h | 19 +++++++++++++++++++
mlir/lib/TableGen/EnumPythonBindingGen.cpp | 6 ++++--
mlir/lib/TableGen/OpPythonBindingGen.cpp | 7 ++++---
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 5 +++--
4 files changed, 30 insertions(+), 7 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/Python.h
diff --git a/mlir/include/mlir/TableGen/Python.h b/mlir/include/mlir/TableGen/Python.h
new file mode 100644
index 00000000000000..d350fca7e574fc
--- /dev/null
+++ b/mlir/include/mlir/TableGen/Python.h
@@ -0,0 +1,19 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_PYTHON_H_
+#define MLIR_TABLEGEN_PYTHON_H_
+
+#include "mlir/Support/LLVM.h"
+#include "llvm/TableGen/Record.h"
+
+namespace mlir {
+namespace tblgen {
+bool emitPythonEnums(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitAllPythonOps(const llvm::RecordKeeper &records, raw_ostream &os);
+
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_PYTHON_H_
diff --git a/mlir/lib/TableGen/EnumPythonBindingGen.cpp b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
index b063a1ec6c8e82..29fb2501233156 100644
--- a/mlir/lib/TableGen/EnumPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/EnumPythonBindingGen.cpp
@@ -10,12 +10,13 @@
// generate the corresponding Python binding classes.
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/AttrOrTypeDef.h"
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Dialect.h"
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/OpGenHelpers.h"
+#include "mlir/TableGen/Python.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/TableGen/Record.h"
@@ -132,7 +133,8 @@ static bool emitDialectEnumAttributeBuilder(StringRef attrDefName,
/// Emits Python bindings for all enums in the record keeper. Returns
/// `false` on success, `true` on failure.
-static bool emitPythonEnums(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitPythonEnums(const RecordKeeper &records,
+ raw_ostream &os) {
os << fileHeader;
for (const Record *it :
records.getAllDerivedDefinitionsIfDefined("EnumAttrInfo")) {
diff --git a/mlir/lib/TableGen/OpPythonBindingGen.cpp b/mlir/lib/TableGen/OpPythonBindingGen.cpp
index db1e76c5a9899e..d47e21702e0c34 100644
--- a/mlir/lib/TableGen/OpPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/OpPythonBindingGen.cpp
@@ -11,10 +11,10 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/OpGenHelpers.h"
-
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/OpGenHelpers.h"
#include "mlir/TableGen/Operator.h"
+#include "mlir/TableGen/Python.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormatVariadic.h"
@@ -1027,7 +1027,8 @@ static void emitOpBindings(const Operator &op, raw_ostream &os) {
/// Emits bindings for the dialect specified in the command line, including file
/// headers and utilities. Returns `false` on success to comply with Tablegen
/// registration requirements.
-static bool emitAllPythonOps(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitAllPythonOps(const RecordKeeper &records,
+ raw_ostream &os) {
if (clDialectName.empty())
llvm::PrintFatalError("dialect name not provided");
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 0604aa1223eaab..f976f70d3a4e34 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -14,6 +14,7 @@
#include "mlir/TableGen/Bytecode.h"
#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/Python.h"
#include "mlir/Tools/mlir-tblgen/MlirTblgenMain.h"
#include "llvm/Support/CommandLine.h"
@@ -136,7 +137,7 @@ static mlir::GenRegistration genDirectiveDecls(
static mlir::GenRegistration
genPythonEnumBindings("gen-python-enum-bindings",
"Generate Python bindings for enum attributes",
- &emitPythonEnums);
+ &tblgen::emitPythonEnums);
//===----------------------------------------------------------------------===//
// Enum registration hooks
@@ -310,7 +311,7 @@ static InterfaceGenRegistration<TypeInterfaceGenerator>
static GenRegistration
genPythonBindings("gen-python-op-bindings",
"Generate Python bindings for MLIR Ops",
- &emitAllPythonOps);
+ &tblgen::emitAllPythonOps);
//===----------------------------------------------------------------------===//
// Pass CAPI registration hooks
>From 828ed7125547bc6a451f9783c1f28a02da22e85b Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:18:17 -0400
Subject: [PATCH 11/24] expose interfaces
---
mlir/include/mlir/TableGen/Interfaces.h | 53 +++++++++++
mlir/lib/TableGen/OpInterfacesGen.cpp | 120 +++++++++---------------
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 9 +-
3 files changed, 100 insertions(+), 82 deletions(-)
diff --git a/mlir/include/mlir/TableGen/Interfaces.h b/mlir/include/mlir/TableGen/Interfaces.h
index 15f667e0ffce00..660e9854b2244e 100644
--- a/mlir/include/mlir/TableGen/Interfaces.h
+++ b/mlir/include/mlir/TableGen/Interfaces.h
@@ -10,9 +10,11 @@
#define MLIR_TABLEGEN_INTERFACES_H_
#include "mlir/Support/LLVM.h"
+#include "mlir/TableGen/Format.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
+#include "llvm/TableGen/Record.h"
namespace llvm {
class Init;
@@ -150,6 +152,57 @@ struct TypeInterface : public Interface {
static bool classof(const Interface *interface);
};
+
+class InterfaceGenerator {
+public:
+ bool emitInterfaceDefs();
+ bool emitInterfaceDecls();
+ bool emitInterfaceDocs();
+
+protected:
+ InterfaceGenerator(std::vector<const llvm::Record *> &&defs, raw_ostream &os)
+ : defs(std::move(defs)), os(os) {}
+
+ void emitConceptDecl(const Interface &interface);
+ void emitModelDecl(const Interface &interface);
+ void emitModelMethodsDef(const Interface &interface);
+ void emitTraitDecl(const Interface &interface, StringRef interfaceName,
+ StringRef interfaceTraitsName);
+ void emitInterfaceDecl(const Interface &interface);
+
+ /// The set of interface records to emit.
+ std::vector<const llvm::Record *> defs;
+ // The stream to emit to.
+ raw_ostream &os;
+ /// The C++ value type of the interface, e.g. Operation*.
+ StringRef valueType;
+ /// The C++ base interface type.
+ StringRef interfaceBaseType;
+ /// The name of the typename for the value template.
+ StringRef valueTemplate;
+ /// The name of the substituion variable for the value.
+ StringRef substVar;
+ /// The format context to use for methods.
+ tblgen::FmtContext nonStaticMethodFmt;
+ tblgen::FmtContext traitMethodFmt;
+ tblgen::FmtContext extraDeclsFmt;
+};
+
+/// A specialized generator for attribute interfaces.
+struct AttrInterfaceGenerator : public InterfaceGenerator {
+ AttrInterfaceGenerator(const llvm::RecordKeeper &records, raw_ostream &os);
+};
+
+/// A specialized generator for operation interfaces.
+struct OpInterfaceGenerator : public InterfaceGenerator {
+ OpInterfaceGenerator(const llvm::RecordKeeper &records, raw_ostream &os);
+};
+
+/// A specialized generator for type interfaces.
+struct TypeInterfaceGenerator : public InterfaceGenerator {
+ TypeInterfaceGenerator(const llvm::RecordKeeper &records, raw_ostream &os);
+};
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/OpInterfacesGen.cpp b/mlir/lib/TableGen/OpInterfacesGen.cpp
index 370de62b90a01f..f3c5c3467a7660 100644
--- a/mlir/lib/TableGen/OpInterfacesGen.cpp
+++ b/mlir/lib/TableGen/OpInterfacesGen.cpp
@@ -82,87 +82,51 @@ getAllInterfaceDefinitions(const RecordKeeper &records, StringRef name) {
namespace mlir::tblgen {
/// This struct is the base generator used when processing tablegen interfaces.
-class InterfaceGenerator {
-public:
- bool emitInterfaceDefs();
- bool emitInterfaceDecls();
- bool emitInterfaceDocs();
-
-protected:
- InterfaceGenerator(std::vector<const Record *> &&defs, raw_ostream &os)
- : defs(std::move(defs)), os(os) {}
-
- void emitConceptDecl(const Interface &interface);
- void emitModelDecl(const Interface &interface);
- void emitModelMethodsDef(const Interface &interface);
- void emitTraitDecl(const Interface &interface, StringRef interfaceName,
- StringRef interfaceTraitsName);
- void emitInterfaceDecl(const Interface &interface);
-
- /// The set of interface records to emit.
- std::vector<const Record *> defs;
- // The stream to emit to.
- raw_ostream &os;
- /// The C++ value type of the interface, e.g. Operation*.
- StringRef valueType;
- /// The C++ base interface type.
- StringRef interfaceBaseType;
- /// The name of the typename for the value template.
- StringRef valueTemplate;
- /// The name of the substituion variable for the value.
- StringRef substVar;
- /// The format context to use for methods.
- tblgen::FmtContext nonStaticMethodFmt;
- tblgen::FmtContext traitMethodFmt;
- tblgen::FmtContext extraDeclsFmt;
-};
-
/// A specialized generator for attribute interfaces.
-struct AttrInterfaceGenerator : public InterfaceGenerator {
- AttrInterfaceGenerator(const RecordKeeper &records, raw_ostream &os)
- : InterfaceGenerator(getAllInterfaceDefinitions(records, "Attr"), os) {
- valueType = "::mlir::Attribute";
- interfaceBaseType = "AttributeInterface";
- valueTemplate = "ConcreteAttr";
- substVar = "_attr";
- StringRef castCode = "(::llvm::cast<ConcreteAttr>(tablegen_opaque_val))";
- nonStaticMethodFmt.addSubst(substVar, castCode).withSelf(castCode);
- traitMethodFmt.addSubst(substVar,
- "(*static_cast<const ConcreteAttr *>(this))");
- extraDeclsFmt.addSubst(substVar, "(*this)");
- }
-};
+AttrInterfaceGenerator::AttrInterfaceGenerator(const RecordKeeper &records,
+ raw_ostream &os)
+ : InterfaceGenerator(getAllInterfaceDefinitions(records, "Attr"), os) {
+ valueType = "::mlir::Attribute";
+ interfaceBaseType = "AttributeInterface";
+ valueTemplate = "ConcreteAttr";
+ substVar = "_attr";
+ StringRef castCode = "(::llvm::cast<ConcreteAttr>(tablegen_opaque_val))";
+ nonStaticMethodFmt.addSubst(substVar, castCode).withSelf(castCode);
+ traitMethodFmt.addSubst(substVar,
+ "(*static_cast<const ConcreteAttr *>(this))");
+ extraDeclsFmt.addSubst(substVar, "(*this)");
+}
+
/// A specialized generator for operation interfaces.
-struct OpInterfaceGenerator : public InterfaceGenerator {
- OpInterfaceGenerator(const RecordKeeper &records, raw_ostream &os)
- : InterfaceGenerator(getAllInterfaceDefinitions(records, "Op"), os) {
- valueType = "::mlir::Operation *";
- interfaceBaseType = "OpInterface";
- valueTemplate = "ConcreteOp";
- substVar = "_op";
- StringRef castCode = "(llvm::cast<ConcreteOp>(tablegen_opaque_val))";
- nonStaticMethodFmt.addSubst("_this", "impl")
- .addSubst(substVar, castCode)
- .withSelf(castCode);
- traitMethodFmt.addSubst(substVar, "(*static_cast<ConcreteOp *>(this))");
- extraDeclsFmt.addSubst(substVar, "(*this)");
- }
-};
+OpInterfaceGenerator::OpInterfaceGenerator(const RecordKeeper &records,
+ raw_ostream &os)
+ : InterfaceGenerator(getAllInterfaceDefinitions(records, "Op"), os) {
+ valueType = "::mlir::Operation *";
+ interfaceBaseType = "OpInterface";
+ valueTemplate = "ConcreteOp";
+ substVar = "_op";
+ StringRef castCode = "(llvm::cast<ConcreteOp>(tablegen_opaque_val))";
+ nonStaticMethodFmt.addSubst("_this", "impl")
+ .addSubst(substVar, castCode)
+ .withSelf(castCode);
+ traitMethodFmt.addSubst(substVar, "(*static_cast<ConcreteOp *>(this))");
+ extraDeclsFmt.addSubst(substVar, "(*this)");
+}
+
/// A specialized generator for type interfaces.
-struct TypeInterfaceGenerator : public InterfaceGenerator {
- TypeInterfaceGenerator(const RecordKeeper &records, raw_ostream &os)
- : InterfaceGenerator(getAllInterfaceDefinitions(records, "Type"), os) {
- valueType = "::mlir::Type";
- interfaceBaseType = "TypeInterface";
- valueTemplate = "ConcreteType";
- substVar = "_type";
- StringRef castCode = "(::llvm::cast<ConcreteType>(tablegen_opaque_val))";
- nonStaticMethodFmt.addSubst(substVar, castCode).withSelf(castCode);
- traitMethodFmt.addSubst(substVar,
- "(*static_cast<const ConcreteType *>(this))");
- extraDeclsFmt.addSubst(substVar, "(*this)");
- }
-};
+TypeInterfaceGenerator::TypeInterfaceGenerator(const RecordKeeper &records,
+ raw_ostream &os)
+ : InterfaceGenerator(getAllInterfaceDefinitions(records, "Type"), os) {
+ valueType = "::mlir::Type";
+ interfaceBaseType = "TypeInterface";
+ valueTemplate = "ConcreteType";
+ substVar = "_type";
+ StringRef castCode = "(::llvm::cast<ConcreteType>(tablegen_opaque_val))";
+ nonStaticMethodFmt.addSubst(substVar, castCode).withSelf(castCode);
+ traitMethodFmt.addSubst(substVar,
+ "(*static_cast<const ConcreteType *>(this))");
+ extraDeclsFmt.addSubst(substVar, "(*this)");
+}
//===----------------------------------------------------------------------===//
// GEN: Interface definitions
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index f976f70d3a4e34..2dee234d057a12 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -14,6 +14,7 @@
#include "mlir/TableGen/Bytecode.h"
#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/Interfaces.h"
#include "mlir/TableGen/Python.h"
#include "mlir/Tools/mlir-tblgen/MlirTblgenMain.h"
@@ -297,11 +298,11 @@ struct InterfaceGenRegistration {
};
} // namespace
-static InterfaceGenRegistration<AttrInterfaceGenerator>
+static InterfaceGenRegistration<tblgen::AttrInterfaceGenerator>
attrInterfaceGen("attr", "attribute");
-static InterfaceGenRegistration<OpInterfaceGenerator> opInterfaceGen("op",
- "op");
-static InterfaceGenRegistration<TypeInterfaceGenerator>
+static InterfaceGenRegistration<tblgen::OpInterfaceGenerator>
+ opInterfaceGen("op", "op");
+static InterfaceGenRegistration<tblgen::TypeInterfaceGenerator>
typeInterfaceGen("type", "type");
//===----------------------------------------------------------------------===//
>From df3a246ff686da25f15899900ff742cd83a3d73a Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:20:55 -0400
Subject: [PATCH 12/24] expose enums
---
mlir/include/mlir/TableGen/Attribute.h | 4 ++++
mlir/lib/TableGen/EnumsGen.cpp | 4 ++--
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 5 +++--
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/mlir/include/mlir/TableGen/Attribute.h b/mlir/include/mlir/TableGen/Attribute.h
index 62720e74849fcd..c1d8938550a983 100644
--- a/mlir/include/mlir/TableGen/Attribute.h
+++ b/mlir/include/mlir/TableGen/Attribute.h
@@ -19,6 +19,7 @@
#include "llvm/ADT/StringRef.h"
namespace llvm {
+class RecordKeeper;
class DefInit;
class Record;
} // namespace llvm
@@ -212,6 +213,9 @@ class EnumAttr : public Attribute {
// Name of infer type op interface.
extern const char *inferTypeOpInterface;
+bool emitEnumDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitEnumDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/EnumsGen.cpp b/mlir/lib/TableGen/EnumsGen.cpp
index 244a97e5a6d350..f00502c54452c9 100644
--- a/mlir/lib/TableGen/EnumsGen.cpp
+++ b/mlir/lib/TableGen/EnumsGen.cpp
@@ -641,7 +641,7 @@ class {1} : public ::mlir::{2} {
emitDenseMapInfo(qualName, underlyingType, cppNamespace, os);
}
-static bool emitEnumDecls(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitEnumDecls(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("Enum Utility Declarations", os, records);
for (const Record *def :
@@ -679,7 +679,7 @@ static void emitEnumDef(const Record &enumDef, raw_ostream &os) {
os << "\n";
}
-static bool emitEnumDefs(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitEnumDefs(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("Enum Utility Definitions", os, records);
for (const Record *def :
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 2dee234d057a12..cc367f9387fddc 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -11,6 +11,7 @@
//===----------------------------------------------------------------------===//
#include "mlir/TableGen/AttrOrTypeDef.h"
+#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Bytecode.h"
#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/GenInfo.h"
@@ -148,14 +149,14 @@ static mlir::GenRegistration
static mlir::GenRegistration
genEnumDecls("gen-enum-decls", "Generate enum utility declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitEnumDecls(records, os);
+ return tblgen::emitEnumDecls(records, os);
});
// Registers the enum utility generator to mlir-tblgen.
static mlir::GenRegistration
genEnumDefs("gen-enum-defs", "Generate enum utility definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitEnumDefs(records, os);
+ return tblgen::emitEnumDefs(records, os);
});
//===----------------------------------------------------------------------===//
>From 77a4e88853adcc4d092a2cbde7f756f89a5163ee Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:33:11 -0400
Subject: [PATCH 13/24] expose llvmir
---
mlir/include/mlir/TableGen/LLVMIR.h | 66 +++++++++++++++++++++++
mlir/lib/TableGen/LLVMIRConversionGen.cpp | 48 ++++++-----------
mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp | 5 +-
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 31 +++++++++--
4 files changed, 110 insertions(+), 40 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/LLVMIR.h
diff --git a/mlir/include/mlir/TableGen/LLVMIR.h b/mlir/include/mlir/TableGen/LLVMIR.h
new file mode 100644
index 00000000000000..eb99495121c5c0
--- /dev/null
+++ b/mlir/include/mlir/TableGen/LLVMIR.h
@@ -0,0 +1,66 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_LLVMIR_H_
+#define MLIR_TABLEGEN_LLVMIR_H_
+
+#include "mlir/Support/LLVM.h"
+
+namespace llvm {
+class Record;
+} // namespace llvm
+
+namespace mlir {
+namespace tblgen {
+
+// Emit all builders. Returns false on success because of the generator
+// registration requirements.
+bool emitLLVMIRConversionBuilders(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+// Emit all op builders. Returns false on success because of the
+// generator registration requirements.
+bool emitLLVMIROpMLIRBuilders(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+// Emit all intrinsic MLIR builders. Returns false on success because of the
+// generator registration requirements.
+bool emitLLVMIRIntrMLIRBuilders(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+// Emits conversion function "LLVMClass convertEnumToLLVM(Enum)" and containing
+// switch-based logic to convert from the MLIR LLVM dialect enum attribute case
+// (Enum) to the corresponding LLVM API enumerant
+void emitOneEnumToConversion(const llvm::Record *record, raw_ostream &os);
+
+// Emits conversion function "Enum convertEnumFromLLVM(LLVMClass)" and
+// containing switch-based logic to convert from the LLVM API enumerant to MLIR
+// LLVM dialect enum attribute (Enum).
+void emitOneEnumFromConversion(const llvm::Record *record, raw_ostream &os);
+
+// Emits conversion function "LLVMClass convertEnumToLLVM(Enum)" and containing
+// switch-based logic to convert from the MLIR LLVM dialect enum attribute case
+// (Enum) to the corresponding LLVM API C-style enumerant
+void emitOneCEnumToConversion(const llvm::Record *record, raw_ostream &os);
+
+// Emits conversion function "Enum convertEnumFromLLVM(LLVMEnum)" and
+// containing switch-based logic to convert from the LLVM API C-style enumerant
+// to MLIR LLVM dialect enum attribute (Enum).
+void emitOneCEnumFromConversion(const llvm::Record *record, raw_ostream &os);
+
+// Emit the list of LLVM IR intrinsics identifiers that are convertible to a
+// matching MLIR LLVM dialect intrinsic operation.
+bool emitConvertibleLLVMIRIntrinsics(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+/// Traverses the list of TableGen definitions derived from the "Intrinsic"
+/// class and generates MLIR ODS definitions for those intrinsics that have
+/// the name matching the filter.
+bool emitLLVMIRIntrinsics(const llvm::RecordKeeper &records,
+ llvm::raw_ostream &os);
+
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_LLVMIR_H_
diff --git a/mlir/lib/TableGen/LLVMIRConversionGen.cpp b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
index 5c6457450a8d08..4f5da3cb213590 100644
--- a/mlir/lib/TableGen/LLVMIRConversionGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRConversionGen.cpp
@@ -14,6 +14,7 @@
#include "mlir/TableGen/Argument.h"
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/LLVMIR.h"
#include "mlir/TableGen/Operator.h"
#include "llvm/ADT/Sequence.h"
@@ -177,8 +178,8 @@ static LogicalResult emitOneBuilder(const Record &record, raw_ostream &os) {
// Emit all builders. Returns false on success because of the generator
// registration requirements.
-static bool emitLLVMIRConversionBuilders(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitLLVMIRConversionBuilders(const RecordKeeper &records,
+ raw_ostream &os) {
for (const Record *def : records.getAllDerivedDefinitions("LLVM_OpBase")) {
if (failed(emitOneBuilder(*def, os)))
return true;
@@ -305,8 +306,8 @@ static LogicalResult emitOneMLIRBuilder(const Record &record, raw_ostream &os,
// Emit all intrinsic MLIR builders. Returns false on success because of the
// generator registration requirements.
-static bool emitLLVMIRIntrMLIRBuilders(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitLLVMIRIntrMLIRBuilders(const RecordKeeper &records,
+ raw_ostream &os) {
// Emit condition to check if "llvmEnumName" matches the intrinsic id.
auto emitIntrCond = [](const Record &record) {
return "intrinsicID == llvm::Intrinsic::" +
@@ -322,8 +323,8 @@ static bool emitLLVMIRIntrMLIRBuilders(const RecordKeeper &records,
// Emit all op builders. Returns false on success because of the
// generator registration requirements.
-static bool emitLLVMIROpMLIRBuilders(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitLLVMIROpMLIRBuilders(const RecordKeeper &records,
+ raw_ostream &os) {
// Emit condition to check if "llvmInstName" matches the instruction opcode.
auto emitOpcodeCond = [](const Record &record) {
return "inst->getOpcode() == llvm::Instruction::" +
@@ -405,12 +406,11 @@ class LLVMCEnumAttr : public tblgen::EnumAttr {
return cases;
}
};
-} // namespace mlir::tblgen
// Emits conversion function "LLVMClass convertEnumToLLVM(Enum)" and containing
// switch-based logic to convert from the MLIR LLVM dialect enum attribute case
// (Enum) to the corresponding LLVM API enumerant
-static void emitOneEnumToConversion(const Record *record, raw_ostream &os) {
+void emitOneEnumToConversion(const Record *record, raw_ostream &os) {
tblgen::LLVMEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
@@ -439,7 +439,7 @@ static void emitOneEnumToConversion(const Record *record, raw_ostream &os) {
// Emits conversion function "LLVMClass convertEnumToLLVM(Enum)" and containing
// switch-based logic to convert from the MLIR LLVM dialect enum attribute case
// (Enum) to the corresponding LLVM API C-style enumerant
-static void emitOneCEnumToConversion(const Record *record, raw_ostream &os) {
+void emitOneCEnumToConversion(const Record *record, raw_ostream &os) {
tblgen::LLVMCEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
@@ -469,7 +469,7 @@ static void emitOneCEnumToConversion(const Record *record, raw_ostream &os) {
// Emits conversion function "Enum convertEnumFromLLVM(LLVMClass)" and
// containing switch-based logic to convert from the LLVM API enumerant to MLIR
// LLVM dialect enum attribute (Enum).
-static void emitOneEnumFromConversion(const Record *record, raw_ostream &os) {
+void emitOneEnumFromConversion(const Record *record, raw_ostream &os) {
tblgen::LLVMEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
@@ -504,7 +504,7 @@ static void emitOneEnumFromConversion(const Record *record, raw_ostream &os) {
// Emits conversion function "Enum convertEnumFromLLVM(LLVMEnum)" and
// containing switch-based logic to convert from the LLVM API C-style enumerant
// to MLIR LLVM dialect enum attribute (Enum).
-static void emitOneCEnumFromConversion(const Record *record, raw_ostream &os) {
+void emitOneCEnumFromConversion(const Record *record, raw_ostream &os) {
tblgen::LLVMCEnumAttr enumAttr(record);
StringRef llvmClass = enumAttr.getLLVMClassName();
StringRef cppClassName = enumAttr.getEnumClassName();
@@ -532,26 +532,6 @@ static void emitOneCEnumFromConversion(const Record *record, raw_ostream &os) {
os << "}\n\n";
}
-// Emits conversion functions between MLIR enum attribute case and corresponding
-// LLVM API enumerants for all registered LLVM dialect enum attributes.
-template <bool ConvertTo>
-static bool emitLLVMIREnumConversionDefs(const RecordKeeper &records,
- raw_ostream &os) {
- for (const Record *def : records.getAllDerivedDefinitions("LLVM_EnumAttr"))
- if (ConvertTo)
- emitOneEnumToConversion(def, os);
- else
- emitOneEnumFromConversion(def, os);
-
- for (const Record *def : records.getAllDerivedDefinitions("LLVM_CEnumAttr"))
- if (ConvertTo)
- emitOneCEnumToConversion(def, os);
- else
- emitOneCEnumFromConversion(def, os);
-
- return false;
-}
-
static void emitOneIntrinsic(const Record &record, raw_ostream &os) {
auto op = tblgen::Operator(record);
os << "llvm::Intrinsic::" << record.getValueAsString("llvmEnumName") << ",\n";
@@ -559,10 +539,12 @@ static void emitOneIntrinsic(const Record &record, raw_ostream &os) {
// Emit the list of LLVM IR intrinsics identifiers that are convertible to a
// matching MLIR LLVM dialect intrinsic operation.
-static bool emitConvertibleLLVMIRIntrinsics(const RecordKeeper &records,
- raw_ostream &os) {
+bool emitConvertibleLLVMIRIntrinsics(const RecordKeeper &records,
+ raw_ostream &os) {
for (const Record *def : records.getAllDerivedDefinitions("LLVM_IntrOpBase"))
emitOneIntrinsic(*def, os);
return false;
}
+
+} // namespace mlir::tblgen
diff --git a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
index e1c95f05aab851..1c83ff9eba2ea8 100644
--- a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
@@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/LLVMIR.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
@@ -250,8 +251,8 @@ static bool emitIntrinsic(const Record &record, llvm::raw_ostream &os) {
/// Traverses the list of TableGen definitions derived from the "Intrinsic"
/// class and generates MLIR ODS definitions for those intrinsics that have
/// the name matching the filter.
-static bool emitLLVMIRIntrinsics(const RecordKeeper &records,
- llvm::raw_ostream &os) {
+bool mlir::tblgen::emitLLVMIRIntrinsics(const RecordKeeper &records,
+ llvm::raw_ostream &os) {
llvm::emitSourceFileHeader("Operations for LLVM intrinsics", os, records);
os << "include \"mlir/Dialect/LLVMIR/LLVMOpBase.td\"\n";
os << "include \"mlir/Interfaces/SideEffectInterfaces.td\"\n\n";
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index cc367f9387fddc..a9f02802ca5440 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -16,12 +16,15 @@
#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Interfaces.h"
+#include "mlir/TableGen/Pass.h"
#include "mlir/TableGen/Python.h"
#include "mlir/Tools/mlir-tblgen/MlirTblgenMain.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/TableGen/Record.h"
+#include "mlir/TableGen/LLVMIR.h"
+
using namespace llvm;
using namespace mlir;
@@ -163,20 +166,38 @@ static mlir::GenRegistration
// LLVMIR registration hooks
//===----------------------------------------------------------------------===//
+template <bool ConvertTo>
+bool emitLLVMIREnumConversionDefs(const RecordKeeper &records,
+ raw_ostream &os) {
+ for (const Record *def : records.getAllDerivedDefinitions("LLVM_EnumAttr"))
+ if (ConvertTo)
+ tblgen::emitOneEnumToConversion(def, os);
+ else
+ tblgen::emitOneEnumFromConversion(def, os);
+
+ for (const Record *def : records.getAllDerivedDefinitions("LLVM_CEnumAttr"))
+ if (ConvertTo)
+ tblgen::emitOneCEnumToConversion(def, os);
+ else
+ tblgen::emitOneCEnumFromConversion(def, os);
+
+ return false;
+}
+
static mlir::GenRegistration
genLLVMIRConversions("gen-llvmir-conversions",
"Generate LLVM IR conversions",
- emitLLVMIRConversionBuilders);
+ tblgen::emitLLVMIRConversionBuilders);
static mlir::GenRegistration genOpFromLLVMIRConversions(
"gen-op-from-llvmir-conversions",
"Generate conversions of operations from LLVM IR",
- emitLLVMIROpMLIRBuilders);
+ tblgen::emitLLVMIROpMLIRBuilders);
static mlir::GenRegistration genIntrFromLLVMIRConversions(
"gen-intr-from-llvmir-conversions",
"Generate conversions of intrinsics from LLVM IR",
- emitLLVMIRIntrMLIRBuilders);
+ tblgen::emitLLVMIRIntrMLIRBuilders);
static mlir::GenRegistration
genEnumToLLVMConversion("gen-enum-to-llvmir-conversions",
@@ -191,11 +212,11 @@ static mlir::GenRegistration genEnumFromLLVMConversion(
static mlir::GenRegistration genConvertibleLLVMIRIntrinsics(
"gen-convertible-llvmir-intrinsics",
"Generate list of convertible LLVM IR intrinsics",
- emitConvertibleLLVMIRIntrinsics);
+ tblgen::emitConvertibleLLVMIRIntrinsics);
static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
"Generate LLVM IR intrinsics",
- emitLLVMIRIntrinsics);
+ tblgen::emitLLVMIRIntrinsics);
//===----------------------------------------------------------------------===//
// OpenMP registration hooks
>From 5545aa1c3cb537bac73158e3b1f1bca5cadcca75 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:35:19 -0400
Subject: [PATCH 14/24] expose openmp
---
mlir/include/mlir/TableGen/OpenMP.h | 26 ++++++++++++++++++++++++++
mlir/lib/TableGen/OmpOpGen.cpp | 9 +++++----
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 5 +++--
3 files changed, 34 insertions(+), 6 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/OpenMP.h
diff --git a/mlir/include/mlir/TableGen/OpenMP.h b/mlir/include/mlir/TableGen/OpenMP.h
new file mode 100644
index 00000000000000..3701db6a381763
--- /dev/null
+++ b/mlir/include/mlir/TableGen/OpenMP.h
@@ -0,0 +1,26 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_OPENMP_H_
+#define MLIR_TABLEGEN_OPENMP_H_
+
+#include "mlir/Support/LLVM.h"
+
+namespace mlir {
+namespace tblgen {
+
+/// Verify that all properties of `OpenMP_Clause`s of records deriving from
+/// `OpenMP_Op`s have been inherited by the latter.
+bool verifyOpenmpDecls(const llvm::RecordKeeper &records, raw_ostream &);
+
+/// Generate structures to represent clause-related operands, based on existing
+/// `OpenMP_Clause` definitions and aggregate them into operation-specific
+/// structures according to the `clauses` argument of each definition deriving
+/// from `OpenMP_Op`.
+bool genOpenmpClauseOps(const llvm::RecordKeeper &records, raw_ostream &os);
+
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_OPENMP_H_
diff --git a/mlir/lib/TableGen/OmpOpGen.cpp b/mlir/lib/TableGen/OmpOpGen.cpp
index 4d92b2b2cbc645..e20bdbbe9ababa 100644
--- a/mlir/lib/TableGen/OmpOpGen.cpp
+++ b/mlir/lib/TableGen/OmpOpGen.cpp
@@ -10,9 +10,8 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/TableGen/GenInfo.h"
-
#include "mlir/TableGen/CodeGenHelpers.h"
+#include "mlir/TableGen/OpenMP.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/TypeSwitch.h"
@@ -327,9 +326,10 @@ static void genOperandsDef(const Record *op, raw_ostream &os) {
os << formatv(operationArgStruct, opName, join(clauseNames, ", "));
}
+namespace mlir::tblgen {
/// Verify that all properties of `OpenMP_Clause`s of records deriving from
/// `OpenMP_Op`s have been inherited by the latter.
-static bool verifyOpenmpDecls(const RecordKeeper &records, raw_ostream &) {
+bool verifyOpenmpDecls(const RecordKeeper &records, raw_ostream &) {
for (const Record *op : records.getAllDerivedDefinitions("OpenMP_Op")) {
for (const Record *clause : op->getValueAsListOfDefs("clauseList"))
verifyClause(op, clause);
@@ -342,7 +342,7 @@ static bool verifyOpenmpDecls(const RecordKeeper &records, raw_ostream &) {
/// `OpenMP_Clause` definitions and aggregate them into operation-specific
/// structures according to the `clauses` argument of each definition deriving
/// from `OpenMP_Op`.
-static bool genOpenmpClauseOps(const RecordKeeper &records, raw_ostream &os) {
+bool genOpenmpClauseOps(const RecordKeeper &records, raw_ostream &os) {
mlir::tblgen::NamespaceEmitter ns(os, "mlir::omp");
for (const Record *clause : records.getAllDerivedDefinitions("OpenMP_Clause"))
genClauseOpsStruct(clause, os);
@@ -355,3 +355,4 @@ static bool genOpenmpClauseOps(const RecordKeeper &records, raw_ostream &os) {
return false;
}
+} // namespace mlir::tblgen
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index a9f02802ca5440..714dfd823ef35b 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -24,6 +24,7 @@
#include "llvm/TableGen/Record.h"
#include "mlir/TableGen/LLVMIR.h"
+#include "mlir/TableGen/OpenMP.h"
using namespace llvm;
using namespace mlir;
@@ -226,12 +227,12 @@ static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
static mlir::GenRegistration
verifyOpenmpOps("verify-openmp-ops",
"Verify OpenMP operations (produce no output file)",
- verifyOpenmpDecls);
+ tblgen::verifyOpenmpDecls);
static mlir::GenRegistration
regOpenmpClauseOps("gen-openmp-clause-ops",
"Generate OpenMP clause operand structures",
- genOpenmpClauseOps);
+ tblgen::genOpenmpClauseOps);
//===----------------------------------------------------------------------===//
// OpDefinition registration hooks
>From 2c4e705e9597dfde65d576e3171076ea9236e25c Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:38:16 -0400
Subject: [PATCH 15/24] expose opdefs
---
mlir/include/mlir/TableGen/OpenMP.h | 6 ++++++
mlir/include/mlir/TableGen/Operator.h | 2 ++
mlir/lib/TableGen/OpDefinitionsGen.cpp | 14 ++++++++------
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 4 ++--
4 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/mlir/include/mlir/TableGen/OpenMP.h b/mlir/include/mlir/TableGen/OpenMP.h
index 3701db6a381763..cec29ccad09cf5 100644
--- a/mlir/include/mlir/TableGen/OpenMP.h
+++ b/mlir/include/mlir/TableGen/OpenMP.h
@@ -20,6 +20,12 @@ bool verifyOpenmpDecls(const llvm::RecordKeeper &records, raw_ostream &);
/// from `OpenMP_Op`.
bool genOpenmpClauseOps(const llvm::RecordKeeper &records, raw_ostream &os);
+/// Emit op declarations for all op records.
+bool emitOpDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+
+/// Emit op definitions for all op records.
+bool emitOpDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/Operator.h b/mlir/include/mlir/TableGen/Operator.h
index 9e570373d9cd32..b353afcea1de9a 100644
--- a/mlir/include/mlir/TableGen/Operator.h
+++ b/mlir/include/mlir/TableGen/Operator.h
@@ -422,6 +422,8 @@ class Operator {
bool allResultsHaveKnownTypes;
};
+
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
index 83e26d1377206e..3a67e2acfe0992 100644
--- a/mlir/lib/TableGen/OpDefinitionsGen.cpp
+++ b/mlir/lib/TableGen/OpDefinitionsGen.cpp
@@ -4608,8 +4608,9 @@ static void emitOpClassDefs(const RecordKeeper &records,
/*emitDecl=*/false);
}
+namespace mlir::tblgen {
/// Emit op declarations for all op records.
-static bool emitOpDecls(const RecordKeeper &records, raw_ostream &os) {
+bool emitOpDecls(const RecordKeeper &records, raw_ostream &os) {
emitSourceFileHeader("Op Declarations", os, records);
std::vector<const Record *> defs = getRequestedOpDefinitions(records);
@@ -4639,10 +4640,9 @@ static bool emitOpDecls(const RecordKeeper &records, raw_ostream &os) {
/// Generate the dialect op registration hook and the op class definitions for a
/// shard of ops.
-static void emitOpDefShard(const RecordKeeper &records,
- ArrayRef<const Record *> defs,
- const Dialect &dialect, unsigned shardIndex,
- unsigned shardCount, raw_ostream &os) {
+void emitOpDefShard(const RecordKeeper &records, ArrayRef<const Record *> defs,
+ const Dialect &dialect, unsigned shardIndex,
+ unsigned shardCount, raw_ostream &os) {
std::string shardGuard = "GET_OP_DEFS_";
std::string indexStr = std::to_string(shardIndex);
shardGuard += indexStr;
@@ -4677,7 +4677,7 @@ static void emitOpDefShard(const RecordKeeper &records,
}
/// Emit op definitions for all op records.
-static bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
+bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
emitSourceFileHeader("Op Definitions", os, records);
std::vector<const Record *> defs = getRequestedOpDefinitions(records);
@@ -4708,3 +4708,5 @@ static bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
}
return false;
}
+
+} // namespace mlir::tblgen
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 714dfd823ef35b..b1a4d3814d7a80 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -241,13 +241,13 @@ static mlir::GenRegistration
static mlir::GenRegistration
genOpDecls("gen-op-decls", "Generate op declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitOpDecls(records, os);
+ return tblgen::emitOpDecls(records, os);
});
static mlir::GenRegistration genOpDefs("gen-op-defs", "Generate op definitions",
[](const RecordKeeper &records,
raw_ostream &os) {
- return emitOpDefs(records, os);
+ return tblgen::emitOpDefs(records, os);
});
//===----------------------------------------------------------------------===//
// Op Doc Registration
>From ba2fd9dd3a831e8584d75ed2471443d82a612abb Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:48:23 -0400
Subject: [PATCH 16/24] expose docs
---
.../mlir/TableGen/AttrOrTypeFormatGen.h | 6 ++---
.../mlir/TableGen/DialectGenUtilities.h | 6 ++---
mlir/include/mlir/TableGen/DocGenUtilities.h | 22 ++++++++++++++++---
mlir/include/mlir/TableGen/FormatGen.h | 6 ++---
mlir/include/mlir/TableGen/OpClass.h | 6 ++---
mlir/include/mlir/TableGen/OpFormatGen.h | 6 ++---
mlir/include/mlir/TableGen/OpGenHelpers.h | 6 ++---
mlir/lib/TableGen/OpDocGen.cpp | 18 ++++++++-------
mlir/lib/TableGen/PassDocGen.cpp | 2 +-
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 13 ++++++-----
10 files changed, 55 insertions(+), 36 deletions(-)
diff --git a/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h b/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
index d4711532a79bb3..18bcd4bb59e7b5 100644
--- a/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
+++ b/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_ATTRORTYPEFORMATGEN_H_
-#define MLIR_TOOLS_MLIRTBLGEN_ATTRORTYPEFORMATGEN_H_
+#ifndef MLIR_MLIRTBLGEN_ATTRORTYPEFORMATGEN_H_
+#define MLIR_MLIRTBLGEN_ATTRORTYPEFORMATGEN_H_
#include "mlir/TableGen/Class.h"
@@ -23,4 +23,4 @@ void generateAttrOrTypeFormat(const AttrOrTypeDef &def, MethodBody &parser,
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_ATTRORTYPEFORMATGEN_H_
+#endif // MLIR_MLIRTBLGEN_ATTRORTYPEFORMATGEN_H_
diff --git a/mlir/include/mlir/TableGen/DialectGenUtilities.h b/mlir/include/mlir/TableGen/DialectGenUtilities.h
index 979a9d67b40470..13be81b6974715 100644
--- a/mlir/include/mlir/TableGen/DialectGenUtilities.h
+++ b/mlir/include/mlir/TableGen/DialectGenUtilities.h
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_DIALECTGENUTILITIES_H_
-#define MLIR_TOOLS_MLIRTBLGEN_DIALECTGENUTILITIES_H_
+#ifndef MLIR_MLIRTBLGEN_DIALECTGENUTILITIES_H_
+#define MLIR_MLIRTBLGEN_DIALECTGENUTILITIES_H_
#include "mlir/Support/LLVM.h"
@@ -21,4 +21,4 @@ std::optional<Dialect> findDialectToGenerate(ArrayRef<Dialect> dialects);
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_DIALECTGENUTILITIES_H_
+#endif // MLIR_MLIRTBLGEN_DIALECTGENUTILITIES_H_
diff --git a/mlir/include/mlir/TableGen/DocGenUtilities.h b/mlir/include/mlir/TableGen/DocGenUtilities.h
index dd1dbbe243911f..14dda530adb17e 100644
--- a/mlir/include/mlir/TableGen/DocGenUtilities.h
+++ b/mlir/include/mlir/TableGen/DocGenUtilities.h
@@ -11,17 +11,19 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_DOCGENUTILITIES_H_
-#define MLIR_TOOLS_MLIRTBLGEN_DOCGENUTILITIES_H_
+#ifndef MLIR_MLIRTBLGEN_DOCGENUTILITIES_H_
+#define MLIR_MLIRTBLGEN_DOCGENUTILITIES_H_
#include "llvm/ADT/StringRef.h"
namespace llvm {
class raw_ostream;
+class RecordKeeper;
} // namespace llvm
namespace mlir {
namespace tblgen {
+class AttrOrTypeDef;
// Emit the summary. To avoid confusion, the summary is styled differently from
// the description.
@@ -39,7 +41,21 @@ void emitDescription(llvm::StringRef description, llvm::raw_ostream &os);
void emitDescriptionComment(llvm::StringRef description, llvm::raw_ostream &os,
llvm::StringRef prefix = "");
+void emitAttrOrTypeDefDoc(const AttrOrTypeDef &def, llvm::raw_ostream &os);
+
+void emitAttrOrTypeDefDoc(const llvm::RecordKeeper &records,
+ llvm::raw_ostream &os,
+ llvm::StringRef recordTypeName);
+
+bool emitDialectDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
+
+void emitOpDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
+
+void emitEnumDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
+
+void emitPassDocs(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
+
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_DOCGENUTILITIES_H_
+#endif // MLIR_MLIRTBLGEN_DOCGENUTILITIES_H_
diff --git a/mlir/include/mlir/TableGen/FormatGen.h b/mlir/include/mlir/TableGen/FormatGen.h
index 1dc2cb3eaa88a6..ecd6f9aea0ef22 100644
--- a/mlir/include/mlir/TableGen/FormatGen.h
+++ b/mlir/include/mlir/TableGen/FormatGen.h
@@ -11,8 +11,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_FORMATGEN_H_
-#define MLIR_TOOLS_MLIRTBLGEN_FORMATGEN_H_
+#ifndef MLIR_MLIRTBLGEN_FORMATGEN_H_
+#define MLIR_MLIRTBLGEN_FORMATGEN_H_
#include "mlir/Support/LLVM.h"
#include "llvm/ADT/StringRef.h"
@@ -601,4 +601,4 @@ extern llvm::cl::opt<bool> formatErrorIsFatal;
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_FORMATGEN_H_
+#endif // MLIR_MLIRTBLGEN_FORMATGEN_H_
diff --git a/mlir/include/mlir/TableGen/OpClass.h b/mlir/include/mlir/TableGen/OpClass.h
index 20b96baf868c77..b5f61c0841d7d9 100644
--- a/mlir/include/mlir/TableGen/OpClass.h
+++ b/mlir/include/mlir/TableGen/OpClass.h
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_OPCLASS_H_
-#define MLIR_TOOLS_MLIRTBLGEN_OPCLASS_H_
+#ifndef MLIR_MLIRTBLGEN_OPCLASS_H_
+#define MLIR_MLIRTBLGEN_OPCLASS_H_
#include "mlir/TableGen/Class.h"
@@ -49,4 +49,4 @@ class OpClass : public Class {
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_OPCLASS_H_
+#endif // MLIR_MLIRTBLGEN_OPCLASS_H_
diff --git a/mlir/include/mlir/TableGen/OpFormatGen.h b/mlir/include/mlir/TableGen/OpFormatGen.h
index 5e43f38498664b..be5cea91dec3d8 100644
--- a/mlir/include/mlir/TableGen/OpFormatGen.h
+++ b/mlir/include/mlir/TableGen/OpFormatGen.h
@@ -11,8 +11,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_OPFORMATGEN_H_
-#define MLIR_TOOLS_MLIRTBLGEN_OPFORMATGEN_H_
+#ifndef MLIR_MLIRTBLGEN_OPFORMATGEN_H_
+#define MLIR_MLIRTBLGEN_OPFORMATGEN_H_
namespace mlir {
namespace tblgen {
@@ -26,4 +26,4 @@ void generateOpFormat(const Operator &constOp, OpClass &opClass,
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_OPFORMATGEN_H_
+#endif // MLIR_MLIRTBLGEN_OPFORMATGEN_H_
diff --git a/mlir/include/mlir/TableGen/OpGenHelpers.h b/mlir/include/mlir/TableGen/OpGenHelpers.h
index 62ae32cacc688c..2a13801ed4794f 100644
--- a/mlir/include/mlir/TableGen/OpGenHelpers.h
+++ b/mlir/include/mlir/TableGen/OpGenHelpers.h
@@ -10,8 +10,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_TOOLS_MLIRTBLGEN_OPGENHELPERS_H_
-#define MLIR_TOOLS_MLIRTBLGEN_OPGENHELPERS_H_
+#ifndef MLIR_MLIRTBLGEN_OPGENHELPERS_H_
+#define MLIR_MLIRTBLGEN_OPGENHELPERS_H_
#include "mlir/Support/LLVM.h"
#include "llvm/TableGen/Record.h"
@@ -37,4 +37,4 @@ void shardOpDefinitions(
} // namespace tblgen
} // namespace mlir
-#endif // MLIR_TOOLS_MLIRTBLGEN_OPGENHELPERS_H_
+#endif // MLIR_MLIRTBLGEN_OPGENHELPERS_H_
diff --git a/mlir/lib/TableGen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
index 7831126c2e1a89..ac5a65d5e76aba 100644
--- a/mlir/lib/TableGen/OpDocGen.cpp
+++ b/mlir/lib/TableGen/OpDocGen.cpp
@@ -286,13 +286,13 @@ static void emitSourceLink(StringRef inputFilename, raw_ostream &os) {
<< inputFromMlirInclude << ")\n\n";
}
-static void emitOpDoc(const RecordKeeper &records, raw_ostream &os) {
+void mlir::tblgen::emitOpDoc(const RecordKeeper &records, raw_ostream &os) {
auto opDefs = getRequestedOpDefinitions(records);
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
emitSourceLink(records.getInputFilename(), os);
for (const Record *opDef : opDefs)
- emitOpDoc(Operator(opDef), os);
+ ::emitOpDoc(Operator(opDef), os);
}
//===----------------------------------------------------------------------===//
@@ -342,7 +342,8 @@ static void emitAttrOrTypeDefAssemblyFormat(const AttrOrTypeDef &def,
os << ">\n```\n";
}
-static void emitAttrOrTypeDefDoc(const AttrOrTypeDef &def, raw_ostream &os) {
+void mlir::tblgen::emitAttrOrTypeDefDoc(const AttrOrTypeDef &def,
+ raw_ostream &os) {
os << formatv("### {0}\n", def.getCppClassName());
// Emit the summary if present.
@@ -375,8 +376,8 @@ static void emitAttrOrTypeDefDoc(const AttrOrTypeDef &def, raw_ostream &os) {
os << "\n";
}
-static void emitAttrOrTypeDefDoc(const RecordKeeper &records, raw_ostream &os,
- StringRef recordTypeName) {
+void emitAttrOrTypeDefDoc(const RecordKeeper &records, raw_ostream &os,
+ StringRef recordTypeName) {
auto defs = records.getAllDerivedDefinitions(recordTypeName);
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
@@ -408,10 +409,10 @@ static void emitEnumDoc(const EnumAttr &def, raw_ostream &os) {
os << "\n";
}
-static void emitEnumDoc(const RecordKeeper &records, raw_ostream &os) {
+void mlir::tblgen::emitEnumDoc(const RecordKeeper &records, raw_ostream &os) {
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
for (const Record *def : records.getAllDerivedDefinitions("EnumAttr"))
- emitEnumDoc(EnumAttr(def), os);
+ ::emitEnumDoc(EnumAttr(def), os);
}
//===----------------------------------------------------------------------===//
@@ -518,7 +519,8 @@ static void emitDialectDoc(const Dialect &dialect, StringRef inputFilename,
os);
}
-static bool emitDialectDoc(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitDialectDoc(const RecordKeeper &records,
+ raw_ostream &os) {
auto dialectDefs = records.getAllDerivedDefinitionsIfDefined("Dialect");
SmallVector<Dialect> dialects(dialectDefs.begin(), dialectDefs.end());
std::optional<Dialect> dialect = findDialectToGenerate(dialects);
diff --git a/mlir/lib/TableGen/PassDocGen.cpp b/mlir/lib/TableGen/PassDocGen.cpp
index 5e25f1dc763d1b..df1f5ad2ea982f 100644
--- a/mlir/lib/TableGen/PassDocGen.cpp
+++ b/mlir/lib/TableGen/PassDocGen.cpp
@@ -57,7 +57,7 @@ static void emitDoc(const Pass &pass, raw_ostream &os) {
}
}
-static void emitPassDocs(const RecordKeeper &records, raw_ostream &os) {
+void mlir::tblgen::emitPassDocs(const RecordKeeper &records, raw_ostream &os) {
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
auto passDefs = records.getAllDerivedDefinitions("PassBase");
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index b1a4d3814d7a80..cc1954399a3f5e 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -14,6 +14,7 @@
#include "mlir/TableGen/Attribute.h"
#include "mlir/TableGen/Bytecode.h"
#include "mlir/TableGen/Directive.h"
+#include "mlir/TableGen/DocGenUtilities.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Interfaces.h"
#include "mlir/TableGen/Pass.h"
@@ -257,35 +258,35 @@ static mlir::GenRegistration
genAttrDocRegister("gen-attrdef-doc",
"Generate dialect attribute documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- emitAttrOrTypeDefDoc(records, os, "AttrDef");
+ tblgen::emitAttrOrTypeDefDoc(records, os, "AttrDef");
return false;
});
static mlir::GenRegistration
genOpDocRegister("gen-op-doc", "Generate dialect documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- emitOpDoc(records, os);
+ tblgen::emitOpDoc(records, os);
return false;
});
static mlir::GenRegistration
genTypeDocRegister("gen-typedef-doc", "Generate dialect type documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- emitAttrOrTypeDefDoc(records, os, "TypeDef");
+ tblgen::emitAttrOrTypeDefDoc(records, os, "TypeDef");
return false;
});
static mlir::GenRegistration
genEnumDocRegister("gen-enum-doc", "Generate dialect enum documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- emitEnumDoc(records, os);
+ tblgen::emitEnumDoc(records, os);
return false;
});
static mlir::GenRegistration
genDialectDocRegister("gen-dialect-doc", "Generate dialect documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitDialectDoc(records, os);
+ return tblgen::emitDialectDoc(records, os);
});
//===----------------------------------------------------------------------===//
@@ -356,7 +357,7 @@ static mlir::GenRegistration genCAPIImpl("gen-pass-capi-impl",
static mlir::GenRegistration
genPassDocRegister("gen-pass-doc", "Generate pass documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- emitPassDocs(records, os);
+ tblgen::emitPassDocs(records, os);
return false;
});
>From 6e2569a96763b78172bcc023465232a9f03fc985 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:53:10 -0400
Subject: [PATCH 17/24] expose pass capi
---
mlir/include/mlir/TableGen/CAPI.h | 21 +++++++++++++++++++++
mlir/include/mlir/TableGen/Directive.h | 3 +--
mlir/lib/TableGen/PassCAPIGen.cpp | 7 +++++--
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 13 +++++++------
4 files changed, 34 insertions(+), 10 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/CAPI.h
diff --git a/mlir/include/mlir/TableGen/CAPI.h b/mlir/include/mlir/TableGen/CAPI.h
new file mode 100644
index 00000000000000..440bd6042f81df
--- /dev/null
+++ b/mlir/include/mlir/TableGen/CAPI.h
@@ -0,0 +1,21 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_CAPI_H_
+#define MLIR_TABLEGEN_CAPI_H_
+
+#include "mlir/Support/LLVM.h"
+#include "llvm/TableGen/Record.h"
+
+namespace mlir {
+namespace tblgen {
+
+bool emitPassCAPIImpl(const llvm::RecordKeeper &records, raw_ostream &os);
+
+bool emitPasssCAPIHeader(const llvm::RecordKeeper &records, raw_ostream &os);
+
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_CAPI_H_
diff --git a/mlir/include/mlir/TableGen/Directive.h b/mlir/include/mlir/TableGen/Directive.h
index 27e537b0ce8529..d51a4c74c0905d 100644
--- a/mlir/include/mlir/TableGen/Directive.h
+++ b/mlir/include/mlir/TableGen/Directive.h
@@ -1,5 +1,4 @@
-//===- Directive.h - Directive class --------------------------------*- C++
-//-*-===//
+//===- Directive.h - Directive class -----------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
diff --git a/mlir/lib/TableGen/PassCAPIGen.cpp b/mlir/lib/TableGen/PassCAPIGen.cpp
index e853e12908564b..ed958a857eeda5 100644
--- a/mlir/lib/TableGen/PassCAPIGen.cpp
+++ b/mlir/lib/TableGen/PassCAPIGen.cpp
@@ -10,6 +10,7 @@
//
//===----------------------------------------------------------------------===//
+#include "mlir/TableGen/CAPI.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Pass.h"
#include "llvm/ADT/StringExtras.h"
@@ -58,7 +59,8 @@ const char *const fileFooter = R"(
)";
/// Emit TODO
-static bool emitCAPIHeader(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitPasssCAPIHeader(const RecordKeeper &records,
+ raw_ostream &os) {
os << fileHeader;
os << "// Registration for the entire group\n";
os << "MLIR_CAPI_EXPORTED void mlirRegister" << groupName
@@ -93,7 +95,8 @@ void mlirRegister{0}Passes(void) {{
}
)";
-static bool emitCAPIImpl(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitPassCAPIImpl(const RecordKeeper &records,
+ raw_ostream &os) {
os << "/* Autogenerated by mlir-tblgen; don't manually edit. */";
os << formatv(passGroupRegistrationCode, groupName);
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index cc1954399a3f5e..be7d01670e1175 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -24,6 +24,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/TableGen/Record.h"
+#include "mlir/TableGen/CAPI.h"
#include "mlir/TableGen/LLVMIR.h"
#include "mlir/TableGen/OpenMP.h"
@@ -342,13 +343,13 @@ static GenRegistration
// Pass CAPI registration hooks
//===----------------------------------------------------------------------===//
-static mlir::GenRegistration genCAPIHeader("gen-pass-capi-header",
- "Generate pass C API header",
- &emitCAPIHeader);
+static mlir::GenRegistration genPassCAPIHeader("gen-pass-capi-header",
+ "Generate pass C API header",
+ &tblgen::emitPasssCAPIHeader);
-static mlir::GenRegistration genCAPIImpl("gen-pass-capi-impl",
- "Generate pass C API implementation",
- &emitCAPIImpl);
+static mlir::GenRegistration
+ genPassCAPIImpl("gen-pass-capi-impl", "Generate pass C API implementation",
+ &tblgen::emitPassCAPIImpl);
//===----------------------------------------------------------------------===//
// Pass Doc registration hooks
>From 9ca1fa62425867db406c0182d973b1a1fb085791 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:54:24 -0400
Subject: [PATCH 18/24] expose pass decls
---
mlir/include/mlir/TableGen/Pass.h | 3 +++
mlir/lib/TableGen/PassGen.cpp | 2 +-
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 3 ++-
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/mlir/include/mlir/TableGen/Pass.h b/mlir/include/mlir/TableGen/Pass.h
index d2bb6e5304ee3f..5e6d70b2f7037a 100644
--- a/mlir/include/mlir/TableGen/Pass.h
+++ b/mlir/include/mlir/TableGen/Pass.h
@@ -13,6 +13,7 @@
#include <vector>
namespace llvm {
+class RecordKeeper;
class Record;
} // namespace llvm
@@ -112,6 +113,8 @@ class Pass {
std::vector<PassStatistic> statistics;
};
+void emitPassDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/PassGen.cpp b/mlir/lib/TableGen/PassGen.cpp
index 5ab3933150259f..a7a4a106e18391 100644
--- a/mlir/lib/TableGen/PassGen.cpp
+++ b/mlir/lib/TableGen/PassGen.cpp
@@ -446,7 +446,7 @@ static void emitOldPassDecl(const Pass &pass, raw_ostream &os) {
os << "};\n";
}
-static void emitPassDecls(const RecordKeeper &records, raw_ostream &os) {
+void mlir::tblgen::emitPassDecls(const RecordKeeper &records, raw_ostream &os) {
std::vector<Pass> passes = getPasses(records);
os << "/* Autogenerated by mlir-tblgen; don't manually edit */\n";
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index be7d01670e1175..0b9f492c03efc6 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -16,6 +16,7 @@
#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/DocGenUtilities.h"
#include "mlir/TableGen/GenInfo.h"
+#include "mlir/TableGen/Pass.h"
#include "mlir/TableGen/Interfaces.h"
#include "mlir/TableGen/Pass.h"
#include "mlir/TableGen/Python.h"
@@ -369,7 +370,7 @@ static mlir::GenRegistration
static mlir::GenRegistration
genPassDecls("gen-pass-decls", "Generate pass declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- emitPassDecls(records, os);
+ tblgen::emitPassDecls(records, os);
return false;
});
>From cc5819f05f301d9eb1fb10f6ee1fc98f30f10c6d Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 18:56:07 -0400
Subject: [PATCH 19/24] expose rewriters
---
mlir/include/mlir/TableGen/Rewriter.h | 17 +++++++++++++++++
mlir/lib/TableGen/RewriterGen.cpp | 3 ++-
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 3 ++-
3 files changed, 21 insertions(+), 2 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/Rewriter.h
diff --git a/mlir/include/mlir/TableGen/Rewriter.h b/mlir/include/mlir/TableGen/Rewriter.h
new file mode 100644
index 00000000000000..ade93c8e5a8ae2
--- /dev/null
+++ b/mlir/include/mlir/TableGen/Rewriter.h
@@ -0,0 +1,17 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_REWRITER_H_
+#define MLIR_TABLEGEN_REWRITER_H_
+
+#include "mlir/Support/LLVM.h"
+#include "llvm/TableGen/Record.h"
+
+namespace mlir {
+namespace tblgen {
+void emitRewriters(const llvm::RecordKeeper &records, raw_ostream &os);
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_REWRITER_H_
diff --git a/mlir/lib/TableGen/RewriterGen.cpp b/mlir/lib/TableGen/RewriterGen.cpp
index a4e47fe59123ab..7f15eb940890cf 100644
--- a/mlir/lib/TableGen/RewriterGen.cpp
+++ b/mlir/lib/TableGen/RewriterGen.cpp
@@ -20,6 +20,7 @@
#include "mlir/TableGen/Pattern.h"
#include "mlir/TableGen/Predicate.h"
#include "mlir/TableGen/Property.h"
+#include "mlir/TableGen/Rewriter.h"
#include "mlir/TableGen/Type.h"
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ADT/SetVector.h"
@@ -1953,7 +1954,7 @@ StringRef StaticMatcherHelper::getVerifierName(DagLeaf leaf) {
return staticVerifierEmitter.getTypeConstraintFn(leaf.getAsConstraint());
}
-static void emitRewriters(const RecordKeeper &records, raw_ostream &os) {
+void mlir::tblgen::emitRewriters(const RecordKeeper &records, raw_ostream &os) {
emitSourceFileHeader("Rewriters", os, records);
auto patterns = records.getAllDerivedDefinitions("Pattern");
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 0b9f492c03efc6..57cac52bcaf5d7 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -28,6 +28,7 @@
#include "mlir/TableGen/CAPI.h"
#include "mlir/TableGen/LLVMIR.h"
#include "mlir/TableGen/OpenMP.h"
+#include "mlir/TableGen/Rewriter.h"
using namespace llvm;
using namespace mlir;
@@ -381,7 +382,7 @@ static mlir::GenRegistration
static mlir::GenRegistration
genRewriters("gen-rewriters", "Generate pattern rewriters",
[](const RecordKeeper &records, raw_ostream &os) {
- emitRewriters(records, os);
+ tblgen::emitRewriters(records, os);
return false;
});
>From e91c610d14611be4ee2e3972fd3b66fed5bd3e96 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 19:02:55 -0400
Subject: [PATCH 20/24] expose spirv
---
mlir/include/mlir/TableGen/SPIRV.h | 38 +++++++++++++++++++++
mlir/lib/TableGen/SPIRVUtilsGen.cpp | 23 ++++++-------
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 46 +++++++++++++-------------
3 files changed, 71 insertions(+), 36 deletions(-)
create mode 100644 mlir/include/mlir/TableGen/SPIRV.h
diff --git a/mlir/include/mlir/TableGen/SPIRV.h b/mlir/include/mlir/TableGen/SPIRV.h
new file mode 100644
index 00000000000000..7650ff751106eb
--- /dev/null
+++ b/mlir/include/mlir/TableGen/SPIRV.h
@@ -0,0 +1,38 @@
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#ifndef MLIR_TABLEGEN_SPIRV_H_
+#define MLIR_TABLEGEN_SPIRV_H_
+
+#include "mlir/Support/LLVM.h"
+#include "llvm/TableGen/Record.h"
+
+namespace mlir {
+namespace tblgen {
+bool emitSPRIVInterfaceDecls(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+bool emitSPRIVInterfaceDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+
+bool emitSPRIVEnumDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+
+bool emitSPIRVEnumDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+
+/// Emits all the autogenerated serialization/deserializations functions for the
+/// SPIRV_Ops.
+bool emitSPIRVSerializationFns(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+bool emitSPIRVAttrUtils(const llvm::RecordKeeper &records, raw_ostream &os);
+
+bool emitSPIRVAvailabilityImpl(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+bool emitSPIRVCapabilityImplication(const llvm::RecordKeeper &records,
+ raw_ostream &os);
+
+} // namespace tblgen
+} // namespace mlir
+
+#endif // MLIR_TABLEGEN_SPIRV_H_
diff --git a/mlir/lib/TableGen/SPIRVUtilsGen.cpp b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
index 799220dedceeb7..5bb7d68126bd84 100644
--- a/mlir/lib/TableGen/SPIRVUtilsGen.cpp
+++ b/mlir/lib/TableGen/SPIRVUtilsGen.cpp
@@ -16,6 +16,7 @@
#include "mlir/TableGen/Format.h"
#include "mlir/TableGen/GenInfo.h"
#include "mlir/TableGen/Operator.h"
+#include "mlir/TableGen/SPIRV.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Sequence.h"
#include "llvm/ADT/SmallVector.h"
@@ -195,8 +196,7 @@ static void emitInterfaceDef(const Availability &availability,
<< "}\n";
}
-static bool emitSPRIVInterfaceDefs(const RecordKeeper &records,
- raw_ostream &os) {
+bool emitSPRIVInterfaceDefs(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("Availability Interface Definitions", os, records);
auto defs = records.getAllDerivedDefinitions("Availability");
@@ -284,8 +284,7 @@ static void emitInterfaceDecl(const Availability &availability,
os << "};\n\n";
}
-static bool emitSPRIVInterfaceDecls(const RecordKeeper &records,
- raw_ostream &os) {
+bool emitSPRIVInterfaceDecls(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("Availability Interface Declarations", os,
records);
@@ -428,7 +427,7 @@ static void emitEnumDecl(const Record &enumDef, raw_ostream &os) {
os << "} // namespace " << ns << "\n";
}
-static bool emitSPRIVEnumDecls(const RecordKeeper &records, raw_ostream &os) {
+bool emitSPRIVEnumDecls(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Enum Availability Declarations", os,
records);
@@ -460,7 +459,7 @@ static void emitEnumDef(const Record &enumDef, raw_ostream &os) {
os << "\n";
}
-static bool emitSPIRVEnumDefs(const RecordKeeper &records, raw_ostream &os) {
+bool emitSPIRVEnumDefs(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Enum Availability Definitions", os,
records);
@@ -1137,8 +1136,7 @@ static void emitExtendedSetDeserializationDispatch(const RecordKeeper &records,
/// Emits all the autogenerated serialization/deserializations functions for the
/// SPIRV_Ops.
-static bool emitSPIRVSerializationFns(const RecordKeeper &records,
- raw_ostream &os) {
+bool emitSPIRVSerializationFns(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Serialization Utilities/Functions", os,
records);
@@ -1207,7 +1205,7 @@ static void emitEnumGetAttrNameFnDefn(const EnumAttr &enumAttr,
os << "}\n";
}
-static bool emitSPIRVAttrUtils(const RecordKeeper &records, raw_ostream &os) {
+bool emitSPIRVAttrUtils(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Attribute Utilities", os, records);
auto defs = records.getAllDerivedDefinitions("EnumAttrInfo");
@@ -1340,8 +1338,7 @@ static void emitSPIRVAvailabilityImpl(const Operator &srcOp, raw_ostream &os) {
}
}
-static bool emitSPIRVAvailabilityImpl(const RecordKeeper &records,
- raw_ostream &os) {
+bool emitSPIRVAvailabilityImpl(const RecordKeeper &records, raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Op Availability Implementations", os,
records);
@@ -1358,8 +1355,8 @@ static bool emitSPIRVAvailabilityImpl(const RecordKeeper &records,
// SPIR-V Capability Implication AutoGen
//===----------------------------------------------------------------------===//
-static bool emitSPIRVCapabilityImplication(const RecordKeeper &records,
- raw_ostream &os) {
+bool emitSPIRVCapabilityImplication(const RecordKeeper &records,
+ raw_ostream &os) {
llvm::emitSourceFileHeader("SPIR-V Capability Implication", os, records);
EnumAttr enumAttr(
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 57cac52bcaf5d7..82742412d94c83 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -29,6 +29,7 @@
#include "mlir/TableGen/LLVMIR.h"
#include "mlir/TableGen/OpenMP.h"
#include "mlir/TableGen/Rewriter.h"
+#include "mlir/TableGen/SPIRV.h"
using namespace llvm;
using namespace mlir;
@@ -391,19 +392,18 @@ static mlir::GenRegistration
//===----------------------------------------------------------------------===//
// Registers the operation interface generator to mlir-tblgen.
-static mlir::GenRegistration
- genSPIRVInterfaceDecls("gen-avail-interface-decls",
- "Generate availability interface declarations",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPRIVInterfaceDecls(records, os);
- });
+static mlir::GenRegistration genSPIRVInterfaceDecls(
+ "gen-avail-interface-decls", "Generate availability interface declarations",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitSPRIVInterfaceDecls(records, os);
+ });
// Registers the operation interface generator to mlir-tblgen.
static mlir::GenRegistration
genSPIRVInterfaceDefs("gen-avail-interface-defs",
"Generate op interface definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSPRIVInterfaceDefs(records, os);
+ return tblgen::emitSPRIVInterfaceDefs(records, os);
});
// Registers the enum utility generator to mlir-tblgen.
@@ -411,7 +411,7 @@ static mlir::GenRegistration
genSPIRVEnumDecls("gen-spirv-enum-avail-decls",
"Generate SPIR-V enum availability declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSPRIVEnumDecls(records, os);
+ return tblgen::emitSPRIVEnumDecls(records, os);
});
// Registers the enum utility generator to mlir-tblgen.
@@ -419,36 +419,35 @@ static mlir::GenRegistration
genSPIRVEnumDefs("gen-spirv-enum-avail-defs",
"Generate SPIR-V enum availability definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVEnumDefs(records, os);
+ return tblgen::emitSPIRVEnumDefs(records, os);
});
static mlir::GenRegistration genSPIRVSerialization(
"gen-spirv-serialization",
"Generate SPIR-V (de)serialization utilities and functions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVSerializationFns(records, os);
+ return tblgen::emitSPIRVSerializationFns(records, os);
});
static mlir::GenRegistration
genSPIRVAttrUtils("gen-spirv-attr-utils",
"Generate SPIR-V attribute utility definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVAttrUtils(records, os);
+ return tblgen::emitSPIRVAttrUtils(records, os);
});
-static mlir::GenRegistration
- genSPIRVAvailabilityImpl("gen-spirv-avail-impls",
- "Generate SPIR-V operation utility definitions",
- [](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVAvailabilityImpl(records, os);
- });
+static mlir::GenRegistration genSPIRVAvailabilityImpl(
+ "gen-spirv-avail-impls", "Generate SPIR-V operation utility definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitSPIRVAvailabilityImpl(records, os);
+ });
static mlir::GenRegistration genSPIRVCapabilityImplication(
"gen-spirv-capability-implication",
"Generate utility function to return implied "
"capabilities for a given capability",
[](const RecordKeeper &records, raw_ostream &os) {
- return emitSPIRVCapabilityImplication(records, os);
+ return tblgen::emitSPIRVCapabilityImplication(records, os);
});
//===----------------------------------------------------------------------===//
@@ -456,10 +455,11 @@ static mlir::GenRegistration genSPIRVCapabilityImplication(
//===----------------------------------------------------------------------===//
// Generator that prints records.
-GenRegistration printRecords("print-records", "Print all records to stdout",
- [](const RecordKeeper &records, raw_ostream &os) {
- os << records;
- return false;
- });
+static GenRegistration
+ printRecords("print-records", "Print all records to stdout",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ os << records;
+ return false;
+ });
int main(int argc, char **argv) { return MlirTblgenMain(argc, argv); }
>From bd811da8cea62111873db60f7b4d008ab8985141 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 19:24:50 -0400
Subject: [PATCH 21/24] missing symbols
---
mlir/lib/TableGen/DialectGen.cpp | 6 ++++--
mlir/lib/TableGen/OpDocGen.cpp | 5 +++--
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/mlir/lib/TableGen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
index 5298f86e22e1f1..9855cc5f52bdfe 100644
--- a/mlir/lib/TableGen/DialectGen.cpp
+++ b/mlir/lib/TableGen/DialectGen.cpp
@@ -298,7 +298,8 @@ static void emitDialectDecl(Dialect &dialect, raw_ostream &os) {
<< "::" << dialect.getCppClassName() << ")\n";
}
-bool emitDialectDecls(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitDialectDecls(const RecordKeeper &records,
+ raw_ostream &os) {
emitSourceFileHeader("Dialect Declarations", os, records);
auto dialectDefs = records.getAllDerivedDefinitions("Dialect");
@@ -390,7 +391,8 @@ static void emitDialectDef(Dialect &dialect, const RecordKeeper &records,
os << llvm::formatv(dialectDestructorStr, cppClassName);
}
-bool emitDialectDefs(const RecordKeeper &records, raw_ostream &os) {
+bool mlir::tblgen::emitDialectDefs(const RecordKeeper &records,
+ raw_ostream &os) {
emitSourceFileHeader("Dialect Definitions", os, records);
auto dialectDefs = records.getAllDerivedDefinitions("Dialect");
diff --git a/mlir/lib/TableGen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
index ac5a65d5e76aba..395960cc600b78 100644
--- a/mlir/lib/TableGen/OpDocGen.cpp
+++ b/mlir/lib/TableGen/OpDocGen.cpp
@@ -376,8 +376,9 @@ void mlir::tblgen::emitAttrOrTypeDefDoc(const AttrOrTypeDef &def,
os << "\n";
}
-void emitAttrOrTypeDefDoc(const RecordKeeper &records, raw_ostream &os,
- StringRef recordTypeName) {
+void mlir::tblgen::emitAttrOrTypeDefDoc(const RecordKeeper &records,
+ raw_ostream &os,
+ StringRef recordTypeName) {
auto defs = records.getAllDerivedDefinitions(recordTypeName);
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
>From 97e0bc96f567f2f081d1bb30dd1c7165d329b8a1 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 20:45:03 -0400
Subject: [PATCH 22/24] move clopts to tool
---
mlir/include/mlir/TableGen/AttrOrTypeDef.h | 21 +-
.../mlir/TableGen/AttrOrTypeFormatGen.h | 2 +-
mlir/include/mlir/TableGen/Bytecode.h | 3 +-
mlir/include/mlir/TableGen/CAPI.h | 6 +-
mlir/include/mlir/TableGen/Dialect.h | 8 +-
.../mlir/TableGen/DialectGenUtilities.h | 6 +-
mlir/include/mlir/TableGen/DocGenUtilities.h | 12 +-
mlir/include/mlir/TableGen/FormatGen.h | 3 -
mlir/include/mlir/TableGen/LLVMIR.h | 8 +-
mlir/include/mlir/TableGen/OpFormatGen.h | 2 +-
mlir/include/mlir/TableGen/OpGenHelpers.h | 7 +-
mlir/include/mlir/TableGen/OpenMP.h | 8 +-
mlir/include/mlir/TableGen/Pass.h | 3 +-
mlir/include/mlir/TableGen/Python.h | 4 +-
mlir/lib/TableGen/AttrOrTypeDefGen.cpp | 17 +-
mlir/lib/TableGen/AttrOrTypeFormatGen.cpp | 3 +-
mlir/lib/TableGen/BytecodeDialectGen.cpp | 8 +-
mlir/lib/TableGen/DialectGen.cpp | 33 ++--
mlir/lib/TableGen/FormatGen.cpp | 9 -
mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp | 41 ++--
mlir/lib/TableGen/OpDefinitionsGen.cpp | 67 ++++---
mlir/lib/TableGen/OpDocGen.cpp | 55 +++---
mlir/lib/TableGen/OpFormatGen.cpp | 3 +-
mlir/lib/TableGen/OpGenHelpers.cpp | 22 +--
mlir/lib/TableGen/OpPythonBindingGen.cpp | 18 +-
mlir/lib/TableGen/PassCAPIGen.cpp | 15 +-
mlir/lib/TableGen/PassGen.cpp | 13 +-
mlir/tools/mlir-tblgen/mlir-tblgen.cpp | 182 +++++++++++++++---
28 files changed, 347 insertions(+), 232 deletions(-)
diff --git a/mlir/include/mlir/TableGen/AttrOrTypeDef.h b/mlir/include/mlir/TableGen/AttrOrTypeDef.h
index 38748bd35dc0b2..c50ae816353d6b 100644
--- a/mlir/include/mlir/TableGen/AttrOrTypeDef.h
+++ b/mlir/include/mlir/TableGen/AttrOrTypeDef.h
@@ -292,7 +292,7 @@ class TypeDef : public AttrOrTypeDef {
class DefGen {
public:
/// Create the attribute or type class.
- DefGen(const AttrOrTypeDef &def);
+ DefGen(const AttrOrTypeDef &def, bool formatErrorIsFatal);
void emitDecl(raw_ostream &os) const;
void emitDef(raw_ostream &os) const;
@@ -318,7 +318,7 @@ class DefGen {
/// custom verifier.
void emitInvariantsVerifier(bool hasImpl, bool hasCustomVerifier);
/// Emit parsers and printers.
- void emitParserPrinter();
+ void emitParserPrinter(bool formatErrorIsFatal);
/// Emit parameter accessors, if required.
void emitAccessors();
/// Emit interface methods.
@@ -392,7 +392,8 @@ class DefGenerator {
protected:
DefGenerator(ArrayRef<const llvm::Record *> defs, raw_ostream &os,
- StringRef defType, StringRef valueType, bool isAttrGenerator);
+ StringRef defType, StringRef valueType, bool isAttrGenerator,
+ bool formatErrorIsFatal);
/// Emit the list of def type names.
void emitTypeDefList(ArrayRef<AttrOrTypeDef> defs);
@@ -411,19 +412,25 @@ class DefGenerator {
/// Flag indicating if this generator is for Attributes. False if the
/// generator is for types.
bool isAttrGenerator;
+ /// Whether a failure in parsing the assembly format should be a fatal error.
+ bool formatErrorIsFatal;
};
/// A specialized generator for AttrDefs.
struct AttrDefGenerator : public DefGenerator {
- AttrDefGenerator(const llvm::RecordKeeper &records, raw_ostream &os)
+ AttrDefGenerator(const llvm::RecordKeeper &records, raw_ostream &os,
+ bool formatErrorIsFatal)
: DefGenerator(records.getAllDerivedDefinitionsIfDefined("AttrDef"), os,
- "Attr", "Attribute", /*isAttrGenerator=*/true) {}
+ "Attr", "Attribute", /*isAttrGenerator=*/true,
+ formatErrorIsFatal) {}
};
/// A specialized generator for TypeDefs.
struct TypeDefGenerator : public DefGenerator {
- TypeDefGenerator(const llvm::RecordKeeper &records, raw_ostream &os)
+ TypeDefGenerator(const llvm::RecordKeeper &records, raw_ostream &os,
+ bool formatErrorIsFatal)
: DefGenerator(records.getAllDerivedDefinitionsIfDefined("TypeDef"), os,
- "Type", "Type", /*isAttrGenerator=*/false) {}
+ "Type", "Type", /*isAttrGenerator=*/false,
+ formatErrorIsFatal) {}
};
void emitTypeConstraintDecls(const llvm::RecordKeeper &records,
diff --git a/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h b/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
index 18bcd4bb59e7b5..90460f27052d7f 100644
--- a/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
+++ b/mlir/include/mlir/TableGen/AttrOrTypeFormatGen.h
@@ -18,7 +18,7 @@ class AttrOrTypeDef;
/// Generate a parser and printer based on a custom assembly format for an
/// attribute or type.
void generateAttrOrTypeFormat(const AttrOrTypeDef &def, MethodBody &parser,
- MethodBody &printer);
+ MethodBody &printer, bool formatErrorIsFatal);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/Bytecode.h b/mlir/include/mlir/TableGen/Bytecode.h
index 33a0b1466d4366..957573fab0b201 100644
--- a/mlir/include/mlir/TableGen/Bytecode.h
+++ b/mlir/include/mlir/TableGen/Bytecode.h
@@ -12,7 +12,8 @@ class RecordKeeper;
} // namespace llvm
namespace mlir::tblgen {
-bool emitBCRW(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitBCRW(const llvm::RecordKeeper &records, raw_ostream &os,
+ const std::string &selectedBcDialect);
} // namespace mlir::tblgen
#endif // MLIR_TABLEGEN_BYTECODE_H
diff --git a/mlir/include/mlir/TableGen/CAPI.h b/mlir/include/mlir/TableGen/CAPI.h
index 440bd6042f81df..d9cea169f7cddd 100644
--- a/mlir/include/mlir/TableGen/CAPI.h
+++ b/mlir/include/mlir/TableGen/CAPI.h
@@ -11,9 +11,11 @@
namespace mlir {
namespace tblgen {
-bool emitPassCAPIImpl(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitPassCAPIImpl(const llvm::RecordKeeper &records, raw_ostream &os,
+ const std::string &groupName);
-bool emitPasssCAPIHeader(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitPasssCAPIHeader(const llvm::RecordKeeper &records, raw_ostream &os,
+ const std::string &groupName);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/Dialect.h b/mlir/include/mlir/TableGen/Dialect.h
index 4f5380d8bab1c7..65199a875d6644 100644
--- a/mlir/include/mlir/TableGen/Dialect.h
+++ b/mlir/include/mlir/TableGen/Dialect.h
@@ -14,6 +14,8 @@
#define MLIR_TABLEGEN_DIALECT_H_
#include "mlir/Support/LLVM.h"
+
+#include "llvm/Support/CommandLine.h"
#include "llvm/TableGen/Record.h"
#include <string>
@@ -113,8 +115,10 @@ class Dialect {
std::vector<StringRef> dependentDialects;
};
-bool emitDialectDecls(const llvm::RecordKeeper &records, raw_ostream &os);
-bool emitDialectDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitDialectDecls(const llvm::RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &selectedDialect);
+bool emitDialectDefs(const llvm::RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &selectedDialect);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/DialectGenUtilities.h b/mlir/include/mlir/TableGen/DialectGenUtilities.h
index 13be81b6974715..73cbc829650dee 100644
--- a/mlir/include/mlir/TableGen/DialectGenUtilities.h
+++ b/mlir/include/mlir/TableGen/DialectGenUtilities.h
@@ -11,13 +11,17 @@
#include "mlir/Support/LLVM.h"
+#include "llvm/Support/CommandLine.h"
+
namespace mlir {
namespace tblgen {
class Dialect;
/// Find the dialect selected by the user to generate for. Returns std::nullopt
/// if no dialect was found, or if more than one potential dialect was found.
-std::optional<Dialect> findDialectToGenerate(ArrayRef<Dialect> dialects);
+std::optional<Dialect>
+findDialectToGenerate(ArrayRef<Dialect> dialects,
+ const llvm::cl::opt<std::string> &selectedDialect);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/DocGenUtilities.h b/mlir/include/mlir/TableGen/DocGenUtilities.h
index 14dda530adb17e..039e2dfde8abd3 100644
--- a/mlir/include/mlir/TableGen/DocGenUtilities.h
+++ b/mlir/include/mlir/TableGen/DocGenUtilities.h
@@ -15,6 +15,7 @@
#define MLIR_MLIRTBLGEN_DOCGENUTILITIES_H_
#include "llvm/ADT/StringRef.h"
+#include "llvm/Support/CommandLine.h"
namespace llvm {
class raw_ostream;
@@ -47,9 +48,16 @@ void emitAttrOrTypeDefDoc(const llvm::RecordKeeper &records,
llvm::raw_ostream &os,
llvm::StringRef recordTypeName);
-bool emitDialectDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
+bool emitDialectDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os,
+ const llvm::cl::opt<std::string> &selectedDialect,
+ const std::string &stripPrefix,
+ bool allowHugoSpecificFeatures,
+ const std::string &opIncFilter,
+ const std::string &opExcFilter);
-void emitOpDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
+void emitOpDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os,
+ const std::string &stripPrefix, bool allowHugoSpecificFeatures,
+ const std::string &opIncFilter, const std::string &opExcFilter);
void emitEnumDoc(const llvm::RecordKeeper &records, llvm::raw_ostream &os);
diff --git a/mlir/include/mlir/TableGen/FormatGen.h b/mlir/include/mlir/TableGen/FormatGen.h
index ecd6f9aea0ef22..8e8be30c628ade 100644
--- a/mlir/include/mlir/TableGen/FormatGen.h
+++ b/mlir/include/mlir/TableGen/FormatGen.h
@@ -595,9 +595,6 @@ bool canFormatStringAsKeyword(StringRef value,
bool isValidLiteral(StringRef value,
function_ref<void(Twine)> emitError = nullptr);
-/// Whether a failure in parsing the assembly format should be a fatal error.
-extern llvm::cl::opt<bool> formatErrorIsFatal;
-
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/LLVMIR.h b/mlir/include/mlir/TableGen/LLVMIR.h
index eb99495121c5c0..c643ebe87790b8 100644
--- a/mlir/include/mlir/TableGen/LLVMIR.h
+++ b/mlir/include/mlir/TableGen/LLVMIR.h
@@ -7,6 +7,8 @@
#include "mlir/Support/LLVM.h"
+#include "llvm/Support/CommandLine.h"
+
namespace llvm {
class Record;
} // namespace llvm
@@ -58,7 +60,11 @@ bool emitConvertibleLLVMIRIntrinsics(const llvm::RecordKeeper &records,
/// class and generates MLIR ODS definitions for those intrinsics that have
/// the name matching the filter.
bool emitLLVMIRIntrinsics(const llvm::RecordKeeper &records,
- llvm::raw_ostream &os);
+ llvm::raw_ostream &os,
+ const llvm::cl::opt<std::string> &nameFilter,
+ const std::string &accessGroupRegexp,
+ const std::string &aliasAnalysisRegexp,
+ const std::string &opBaseClass);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/OpFormatGen.h b/mlir/include/mlir/TableGen/OpFormatGen.h
index be5cea91dec3d8..5ecbf9730a24e3 100644
--- a/mlir/include/mlir/TableGen/OpFormatGen.h
+++ b/mlir/include/mlir/TableGen/OpFormatGen.h
@@ -21,7 +21,7 @@ class Operator;
// Generate the assembly format for the given operator.
void generateOpFormat(const Operator &constOp, OpClass &opClass,
- bool hasProperties);
+ bool hasProperties, bool formatErrorIsFatal);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/OpGenHelpers.h b/mlir/include/mlir/TableGen/OpGenHelpers.h
index 2a13801ed4794f..ac623fd2ab81cf 100644
--- a/mlir/include/mlir/TableGen/OpGenHelpers.h
+++ b/mlir/include/mlir/TableGen/OpGenHelpers.h
@@ -23,7 +23,9 @@ namespace tblgen {
/// Returns all the op definitions filtered by the user. The filtering is via
/// command-line option "op-include-regex" and "op-exclude-regex".
std::vector<const llvm::Record *>
-getRequestedOpDefinitions(const llvm::RecordKeeper &records);
+getRequestedOpDefinitions(const llvm::RecordKeeper &records,
+ const std::string &opIncFilter,
+ const std::string &opExcFilter);
/// Checks whether `str` is a Python keyword or would shadow builtin function.
/// Regenerate using python -c"print(set(sorted(__import__('keyword').kwlist)))"
@@ -32,7 +34,8 @@ bool isPythonReserved(llvm::StringRef str);
/// Shard the op defintions into the number of shards set by "op-shard-count".
void shardOpDefinitions(
ArrayRef<const llvm::Record *> defs,
- SmallVectorImpl<ArrayRef<const llvm::Record *>> &shardedDefs);
+ SmallVectorImpl<ArrayRef<const llvm::Record *>> &shardedDefs,
+ unsigned opShardCount);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/OpenMP.h b/mlir/include/mlir/TableGen/OpenMP.h
index cec29ccad09cf5..95f9434afaa634 100644
--- a/mlir/include/mlir/TableGen/OpenMP.h
+++ b/mlir/include/mlir/TableGen/OpenMP.h
@@ -21,10 +21,14 @@ bool verifyOpenmpDecls(const llvm::RecordKeeper &records, raw_ostream &);
bool genOpenmpClauseOps(const llvm::RecordKeeper &records, raw_ostream &os);
/// Emit op declarations for all op records.
-bool emitOpDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitOpDecls(const llvm::RecordKeeper &records, raw_ostream &os,
+ bool formatErrorIsFatal, const std::string &opIncFilter,
+ const std::string &opExcFilter, unsigned opShardCount);
/// Emit op definitions for all op records.
-bool emitOpDefs(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitOpDefs(const llvm::RecordKeeper &records, raw_ostream &os,
+ bool formatErrorIsFatal, const std::string &opIncFilter,
+ const std::string &opExcFilter, unsigned opShardCount);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/Pass.h b/mlir/include/mlir/TableGen/Pass.h
index 5e6d70b2f7037a..1bf864f1b33df5 100644
--- a/mlir/include/mlir/TableGen/Pass.h
+++ b/mlir/include/mlir/TableGen/Pass.h
@@ -113,7 +113,8 @@ class Pass {
std::vector<PassStatistic> statistics;
};
-void emitPassDecls(const llvm::RecordKeeper &records, raw_ostream &os);
+void emitPassDecls(const llvm::RecordKeeper &records, raw_ostream &os,
+ const std::string &groupName);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/include/mlir/TableGen/Python.h b/mlir/include/mlir/TableGen/Python.h
index d350fca7e574fc..cf17bc8c3b893b 100644
--- a/mlir/include/mlir/TableGen/Python.h
+++ b/mlir/include/mlir/TableGen/Python.h
@@ -11,7 +11,9 @@
namespace mlir {
namespace tblgen {
bool emitPythonEnums(const llvm::RecordKeeper &records, raw_ostream &os);
-bool emitAllPythonOps(const llvm::RecordKeeper &records, raw_ostream &os);
+bool emitAllPythonOps(const llvm::RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &clDialectName,
+ const llvm::cl::opt<std::string> &clDialectExtensionName);
} // namespace tblgen
} // namespace mlir
diff --git a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
index 238631f77f34c4..85d18b361748ba 100644
--- a/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeDefGen.cpp
@@ -78,7 +78,7 @@ void DefGen::emitDef(raw_ostream &os) const {
defCls.writeDefTo(os);
}
-DefGen::DefGen(const AttrOrTypeDef &def)
+DefGen::DefGen(const AttrOrTypeDef &def, bool formatErrorIsFatal)
: def(def), params(def.getParameters()), defCls(def.getCppClassName()),
valueType(isa<AttrDef>(def) ? "Attribute" : "Type"),
defType(isa<AttrDef>(def) ? "Attr" : "Type") {
@@ -115,7 +115,7 @@ DefGen::DefGen(const AttrOrTypeDef &def)
emitInvariantsVerifier(genVerifyInvariantsImpl, genVerifyDecl);
// Emit the mnemonic, if there is one, and any associated parser and printer.
if (def.getMnemonic())
- emitParserPrinter();
+ emitParserPrinter(formatErrorIsFatal);
// Emit accessors
if (def.genAccessors())
emitAccessors();
@@ -299,7 +299,7 @@ void DefGen::emitInvariantsVerifier(bool hasImpl, bool hasCustomVerifier) {
verifier->body() << "return ::mlir::success();";
}
-void DefGen::emitParserPrinter() {
+void DefGen::emitParserPrinter(bool formatErrorIsFatal) {
auto *mnemonic = defCls.addStaticMethod<Method::Constexpr>(
"::llvm::StringLiteral", "getMnemonic");
mnemonic->body().indent() << strfmt("return {\"{0}\"};", *def.getMnemonic());
@@ -325,7 +325,8 @@ void DefGen::emitParserPrinter() {
MethodParameter("::mlir::AsmPrinter &", "odsPrinter"));
// Emit the bodies if we are using the declarative format.
if (hasAssemblyFormat)
- return generateAttrOrTypeFormat(def, parser->body(), printer->body());
+ return generateAttrOrTypeFormat(def, parser->body(), printer->body(),
+ formatErrorIsFatal);
}
void DefGen::emitAccessors() {
@@ -593,9 +594,9 @@ void DefGen::emitStorageClass() {
/// This struct is the base generator used when processing tablegen interfaces.
DefGenerator::DefGenerator(ArrayRef<const Record *> defs, raw_ostream &os,
StringRef defType, StringRef valueType,
- bool isAttrGenerator)
+ bool isAttrGenerator, bool formatErrorIsFatal)
: defRecords(defs), os(os), defType(defType), valueType(valueType),
- isAttrGenerator(isAttrGenerator) {
+ isAttrGenerator(isAttrGenerator), formatErrorIsFatal(formatErrorIsFatal) {
// Sort by occurrence in file.
llvm::sort(defRecords, [](const Record *lhs, const Record *rhs) {
return lhs->getID() < rhs->getID();
@@ -635,7 +636,7 @@ bool DefGenerator::emitDecls(StringRef selectedDialect) {
// Emit the declarations.
for (const AttrOrTypeDef &def : defs)
- DefGen(def).emitDecl(os);
+ DefGen(def, formatErrorIsFatal).emitDecl(os);
}
// Emit the TypeID explicit specializations to have a single definition for
// each of these.
@@ -849,7 +850,7 @@ bool DefGenerator::emitDefs(StringRef selectedDialect) {
for (const AttrOrTypeDef &def : defs) {
{
NamespaceEmitter ns(os, def.getDialect());
- DefGen gen(def);
+ DefGen gen(def, formatErrorIsFatal);
gen.emitDef(os);
}
// Emit the TypeID explicit specializations to have a single symbol def.
diff --git a/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
index 2cdacf05639cca..d9eca0fa276fc1 100644
--- a/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
+++ b/mlir/lib/TableGen/AttrOrTypeFormatGen.cpp
@@ -1212,7 +1212,8 @@ FailureOr<FormatElement *> DefFormatParser::parseStructDirective(SMLoc loc,
void mlir::tblgen::generateAttrOrTypeFormat(const AttrOrTypeDef &def,
MethodBody &parser,
- MethodBody &printer) {
+ MethodBody &printer,
+ bool formatErrorIsFatal) {
llvm::SourceMgr mgr;
mgr.AddNewSourceBuffer(
llvm::MemoryBuffer::getMemBuffer(*def.getAssemblyFormat()), SMLoc());
diff --git a/mlir/lib/TableGen/BytecodeDialectGen.cpp b/mlir/lib/TableGen/BytecodeDialectGen.cpp
index 726d9c8975493a..0895710c1a751e 100644
--- a/mlir/lib/TableGen/BytecodeDialectGen.cpp
+++ b/mlir/lib/TableGen/BytecodeDialectGen.cpp
@@ -19,11 +19,6 @@
using namespace llvm;
-static cl::OptionCategory dialectGenCat("Options for -gen-bytecode");
-static cl::opt<std::string>
- selectedBcDialect("bytecode-dialect", cl::desc("The dialect to gen for"),
- cl::cat(dialectGenCat), cl::CommaSeparated);
-
namespace mlir::tblgen {
/// Helper class to generate C++ bytecode parser helpers.
@@ -433,7 +428,8 @@ struct AttrOrType {
std::vector<const Record *> attr, type;
};
-bool emitBCRW(const RecordKeeper &records, raw_ostream &os) {
+bool emitBCRW(const RecordKeeper &records, raw_ostream &os,
+ const std::string &selectedBcDialect) {
MapVector<StringRef, AttrOrType> dialectAttrOrType;
for (const Record *it :
records.getAllDerivedDefinitions("DialectAttributes")) {
diff --git a/mlir/lib/TableGen/DialectGen.cpp b/mlir/lib/TableGen/DialectGen.cpp
index 9855cc5f52bdfe..4964e80e7d4903 100644
--- a/mlir/lib/TableGen/DialectGen.cpp
+++ b/mlir/lib/TableGen/DialectGen.cpp
@@ -33,11 +33,6 @@ using namespace mlir::tblgen;
using llvm::Record;
using llvm::RecordKeeper;
-static llvm::cl::OptionCategory dialectGenCat("Options for -gen-dialect-*");
-llvm::cl::opt<std::string>
- selectedDialect("dialect", llvm::cl::desc("The dialect to gen for"),
- llvm::cl::cat(dialectGenCat), llvm::cl::CommaSeparated);
-
/// Utility iterator used for filtering records for a specific dialect.
namespace mlir::tblgen {
using DialectFilterIterator =
@@ -72,8 +67,9 @@ filterForDialect(ArrayRef<Record *> records, Dialect &dialect) {
DialectFilterIterator(records.end(), records.end(), filterFn)};
}
-std::optional<Dialect>
-tblgen::findDialectToGenerate(ArrayRef<Dialect> dialects) {
+std::optional<Dialect> tblgen::findDialectToGenerate(
+ ArrayRef<Dialect> dialects,
+ const llvm::cl::opt<std::string> &selectedDialect) {
if (dialects.empty()) {
llvm::errs() << "no dialect was found\n";
return std::nullopt;
@@ -89,9 +85,10 @@ tblgen::findDialectToGenerate(ArrayRef<Dialect> dialects) {
return std::nullopt;
}
- const auto *dialectIt = llvm::find_if(dialects, [](const Dialect &dialect) {
- return dialect.getName() == selectedDialect;
- });
+ const auto *dialectIt =
+ llvm::find_if(dialects, [&selectedDialect](const Dialect &dialect) {
+ return dialect.getName() == selectedDialect;
+ });
if (dialectIt == dialects.end()) {
llvm::errs() << "selected dialect with '-dialect' does not exist\n";
return std::nullopt;
@@ -298,8 +295,9 @@ static void emitDialectDecl(Dialect &dialect, raw_ostream &os) {
<< "::" << dialect.getCppClassName() << ")\n";
}
-bool mlir::tblgen::emitDialectDecls(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitDialectDecls(
+ const RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &selectedDialect) {
emitSourceFileHeader("Dialect Declarations", os, records);
auto dialectDefs = records.getAllDerivedDefinitions("Dialect");
@@ -307,7 +305,8 @@ bool mlir::tblgen::emitDialectDecls(const RecordKeeper &records,
return false;
SmallVector<Dialect> dialects(dialectDefs.begin(), dialectDefs.end());
- std::optional<Dialect> dialect = findDialectToGenerate(dialects);
+ std::optional<Dialect> dialect =
+ findDialectToGenerate(dialects, selectedDialect);
if (!dialect)
return true;
emitDialectDecl(*dialect, os);
@@ -391,8 +390,9 @@ static void emitDialectDef(Dialect &dialect, const RecordKeeper &records,
os << llvm::formatv(dialectDestructorStr, cppClassName);
}
-bool mlir::tblgen::emitDialectDefs(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitDialectDefs(
+ const RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &selectedDialect) {
emitSourceFileHeader("Dialect Definitions", os, records);
auto dialectDefs = records.getAllDerivedDefinitions("Dialect");
@@ -400,7 +400,8 @@ bool mlir::tblgen::emitDialectDefs(const RecordKeeper &records,
return false;
SmallVector<Dialect> dialects(dialectDefs.begin(), dialectDefs.end());
- std::optional<Dialect> dialect = findDialectToGenerate(dialects);
+ std::optional<Dialect> dialect =
+ findDialectToGenerate(dialects, selectedDialect);
if (!dialect)
return true;
emitDialectDef(*dialect, records, os);
diff --git a/mlir/lib/TableGen/FormatGen.cpp b/mlir/lib/TableGen/FormatGen.cpp
index 63568922a31b36..7834ea453a1172 100644
--- a/mlir/lib/TableGen/FormatGen.cpp
+++ b/mlir/lib/TableGen/FormatGen.cpp
@@ -532,12 +532,3 @@ bool mlir::tblgen::isValidLiteral(StringRef value,
// Otherwise, this must be an identifier.
return canFormatStringAsKeyword(value, emitError);
}
-
-//===----------------------------------------------------------------------===//
-// Commandline Options
-//===----------------------------------------------------------------------===//
-
-llvm::cl::opt<bool> mlir::tblgen::formatErrorIsFatal(
- "asmformat-error-is-fatal",
- llvm::cl::desc("Emit a fatal error if format parsing fails"),
- llvm::cl::init(true));
diff --git a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
index 1c83ff9eba2ea8..11dc46d9458204 100644
--- a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
@@ -30,32 +30,6 @@ using llvm::RecordKeeper;
using llvm::Regex;
using namespace mlir;
-static llvm::cl::OptionCategory intrinsicGenCat("Intrinsics Generator Options");
-
-static llvm::cl::opt<std::string>
- nameFilter("llvmir-intrinsics-filter",
- llvm::cl::desc("Only keep the intrinsics with the specified "
- "substring in their record name"),
- llvm::cl::cat(intrinsicGenCat));
-
-static llvm::cl::opt<std::string>
- opBaseClass("dialect-opclass-base",
- llvm::cl::desc("The base class for the ops in the dialect we "
- "are planning to emit"),
- llvm::cl::init("LLVM_IntrOp"), llvm::cl::cat(intrinsicGenCat));
-
-static llvm::cl::opt<std::string> accessGroupRegexp(
- "llvmir-intrinsics-access-group-regexp",
- llvm::cl::desc("Mark intrinsics that match the specified "
- "regexp as taking an access group metadata"),
- llvm::cl::cat(intrinsicGenCat));
-
-static llvm::cl::opt<std::string> aliasAnalysisRegexp(
- "llvmir-intrinsics-alias-analysis-regexp",
- llvm::cl::desc("Mark intrinsics that match the specified "
- "regexp as taking alias.scopes, noalias, and tbaa metadata"),
- llvm::cl::cat(intrinsicGenCat));
-
// Used to represent the indices of overloadable operands/results.
using IndicesTy = llvm::SmallBitVector;
@@ -200,7 +174,10 @@ void printBracketedRange(const Range &range, llvm::raw_ostream &os) {
/// Emits ODS (TableGen-based) code for `record` representing an LLVM intrinsic.
/// Returns true on error, false on success.
-static bool emitIntrinsic(const Record &record, llvm::raw_ostream &os) {
+static bool emitIntrinsic(const Record &record, llvm::raw_ostream &os,
+ const std::string &accessGroupRegexp,
+ const std::string &aliasAnalysisRegexp,
+ const std::string &opBaseClass) {
tblgen::LLVMIntrinsic intr(record);
Regex accessGroupMatcher(accessGroupRegexp);
@@ -251,8 +228,11 @@ static bool emitIntrinsic(const Record &record, llvm::raw_ostream &os) {
/// Traverses the list of TableGen definitions derived from the "Intrinsic"
/// class and generates MLIR ODS definitions for those intrinsics that have
/// the name matching the filter.
-bool mlir::tblgen::emitLLVMIRIntrinsics(const RecordKeeper &records,
- llvm::raw_ostream &os) {
+bool mlir::tblgen::emitLLVMIRIntrinsics(
+ const RecordKeeper &records, llvm::raw_ostream &os,
+ const llvm::cl::opt<std::string> &nameFilter,
+ const std::string &accessGroupRegexp,
+ const std::string &aliasAnalysisRegexp, const std::string &opBaseClass) {
llvm::emitSourceFileHeader("Operations for LLVM intrinsics", os, records);
os << "include \"mlir/Dialect/LLVMIR/LLVMOpBase.td\"\n";
os << "include \"mlir/Interfaces/SideEffectInterfaces.td\"\n\n";
@@ -261,7 +241,8 @@ bool mlir::tblgen::emitLLVMIRIntrinsics(const RecordKeeper &records,
for (const Record *r : defs) {
if (!nameFilter.empty() && !r->getName().contains(nameFilter))
continue;
- if (emitIntrinsic(*r, os))
+ if (emitIntrinsic(*r, os, accessGroupRegexp, aliasAnalysisRegexp,
+ opBaseClass))
return true;
}
diff --git a/mlir/lib/TableGen/OpDefinitionsGen.cpp b/mlir/lib/TableGen/OpDefinitionsGen.cpp
index 3a67e2acfe0992..d0bfd280d5b843 100644
--- a/mlir/lib/TableGen/OpDefinitionsGen.cpp
+++ b/mlir/lib/TableGen/OpDefinitionsGen.cpp
@@ -588,14 +588,17 @@ class OpEmitter {
public:
static void
emitDecl(const Operator &op, raw_ostream &os,
- const StaticVerifierFunctionEmitter &staticVerifierEmitter);
+ const StaticVerifierFunctionEmitter &staticVerifierEmitter,
+ bool formatErrorIsFatal);
static void
emitDef(const Operator &op, raw_ostream &os,
- const StaticVerifierFunctionEmitter &staticVerifierEmitter);
+ const StaticVerifierFunctionEmitter &staticVerifierEmitter,
+ bool formatErrorIsFatal);
private:
OpEmitter(const Operator &op,
- const StaticVerifierFunctionEmitter &staticVerifierEmitter);
+ const StaticVerifierFunctionEmitter &staticVerifierEmitter,
+ bool formatErrorIsFatal);
void emitDecl(raw_ostream &os);
void emitDef(raw_ostream &os);
@@ -1069,7 +1072,8 @@ static std::string formatExtraDefinitions(const Operator &op) {
}
OpEmitter::OpEmitter(const Operator &op,
- const StaticVerifierFunctionEmitter &staticVerifierEmitter)
+ const StaticVerifierFunctionEmitter &staticVerifierEmitter,
+ bool formatErrorIsFatal)
: def(op.getDef()), op(op),
opClass(op.getCppClassName(), formatExtraDeclarations(op),
formatExtraDefinitions(op)),
@@ -1106,19 +1110,21 @@ OpEmitter::OpEmitter(const Operator &op,
genFolderDecls();
genTypeInterfaceMethods();
genOpInterfaceMethods();
- generateOpFormat(op, opClass, emitHelper.hasProperties());
+ generateOpFormat(op, opClass, emitHelper.hasProperties(), formatErrorIsFatal);
genSideEffectInterfaceMethods();
}
void OpEmitter::emitDecl(
const Operator &op, raw_ostream &os,
- const StaticVerifierFunctionEmitter &staticVerifierEmitter) {
- OpEmitter(op, staticVerifierEmitter).emitDecl(os);
+ const StaticVerifierFunctionEmitter &staticVerifierEmitter,
+ bool formatErrorIsFatal) {
+ OpEmitter(op, staticVerifierEmitter, formatErrorIsFatal).emitDecl(os);
}
void OpEmitter::emitDef(
const Operator &op, raw_ostream &os,
- const StaticVerifierFunctionEmitter &staticVerifierEmitter) {
- OpEmitter(op, staticVerifierEmitter).emitDef(os);
+ const StaticVerifierFunctionEmitter &staticVerifierEmitter,
+ bool formatErrorIsFatal) {
+ OpEmitter(op, staticVerifierEmitter, formatErrorIsFatal).emitDef(os);
}
void OpEmitter::emitDecl(raw_ostream &os) {
@@ -4534,7 +4540,7 @@ static void
emitOpClasses(const RecordKeeper &records,
const std::vector<const Record *> &defs, raw_ostream &os,
const StaticVerifierFunctionEmitter &staticVerifierEmitter,
- bool emitDecl) {
+ bool emitDecl, bool formatErrorIsFatal) {
if (defs.empty())
return;
@@ -4546,7 +4552,7 @@ emitOpClasses(const RecordKeeper &records,
os << formatv(opCommentHeader, op.getQualCppClassName(),
"declarations");
OpOperandAdaptorEmitter::emitDecl(op, staticVerifierEmitter, os);
- OpEmitter::emitDecl(op, os, staticVerifierEmitter);
+ OpEmitter::emitDecl(op, os, staticVerifierEmitter, formatErrorIsFatal);
}
// Emit the TypeID explicit specialization to have a single definition.
if (!op.getCppNamespace().empty())
@@ -4557,7 +4563,7 @@ emitOpClasses(const RecordKeeper &records,
NamespaceEmitter emitter(os, op.getCppNamespace());
os << formatv(opCommentHeader, op.getQualCppClassName(), "definitions");
OpOperandAdaptorEmitter::emitDef(op, staticVerifierEmitter, os);
- OpEmitter::emitDef(op, os, staticVerifierEmitter);
+ OpEmitter::emitDef(op, os, staticVerifierEmitter, formatErrorIsFatal);
}
// Emit the TypeID explicit specialization to have a single definition.
if (!op.getCppNamespace().empty())
@@ -4570,7 +4576,7 @@ emitOpClasses(const RecordKeeper &records,
/// Emit the declarations for the provided op classes.
static void emitOpClassDecls(const RecordKeeper &records,
const std::vector<const Record *> &defs,
- raw_ostream &os) {
+ raw_ostream &os, bool formatErrorIsFatal) {
// First emit forward declaration for each class, this allows them to refer
// to each others in traits for example.
for (auto *def : defs) {
@@ -4586,12 +4592,13 @@ static void emitOpClassDecls(const RecordKeeper &records,
StaticVerifierFunctionEmitter staticVerifierEmitter(os, records);
staticVerifierEmitter.collectOpConstraints(defs);
emitOpClasses(records, defs, os, staticVerifierEmitter,
- /*emitDecl=*/true);
+ /*emitDecl=*/true, formatErrorIsFatal);
}
/// Emit the definitions for the provided op classes.
static void emitOpClassDefs(const RecordKeeper &records,
ArrayRef<const Record *> defs, raw_ostream &os,
+ bool formatErrorIsFatal,
StringRef constraintPrefix = "") {
if (defs.empty())
return;
@@ -4605,21 +4612,24 @@ static void emitOpClassDefs(const RecordKeeper &records,
// Emit the classes.
emitOpClasses(records, defs, os, staticVerifierEmitter,
- /*emitDecl=*/false);
+ /*emitDecl=*/false, formatErrorIsFatal);
}
namespace mlir::tblgen {
/// Emit op declarations for all op records.
-bool emitOpDecls(const RecordKeeper &records, raw_ostream &os) {
+bool emitOpDecls(const RecordKeeper &records, raw_ostream &os,
+ bool formatErrorIsFatal, const std::string &opIncFilter,
+ const std::string &opExcFilter, unsigned opShardCount) {
emitSourceFileHeader("Op Declarations", os, records);
- std::vector<const Record *> defs = getRequestedOpDefinitions(records);
- emitOpClassDecls(records, defs, os);
+ std::vector<const Record *> defs =
+ getRequestedOpDefinitions(records, opIncFilter, opExcFilter);
+ emitOpClassDecls(records, defs, os, formatErrorIsFatal);
// If we are generating sharded op definitions, emit the sharded op
// registration hooks.
SmallVector<ArrayRef<const Record *>, 4> shardedDefs;
- shardOpDefinitions(defs, shardedDefs);
+ shardOpDefinitions(defs, shardedDefs, opShardCount);
if (defs.empty() || shardedDefs.size() <= 1)
return false;
@@ -4642,7 +4652,8 @@ bool emitOpDecls(const RecordKeeper &records, raw_ostream &os) {
/// shard of ops.
void emitOpDefShard(const RecordKeeper &records, ArrayRef<const Record *> defs,
const Dialect &dialect, unsigned shardIndex,
- unsigned shardCount, raw_ostream &os) {
+ unsigned shardCount, raw_ostream &os,
+ bool formatErrorIsFatal) {
std::string shardGuard = "GET_OP_DEFS_";
std::string indexStr = std::to_string(shardIndex);
shardGuard += indexStr;
@@ -4673,16 +4684,19 @@ void emitOpDefShard(const RecordKeeper &records, ArrayRef<const Record *> defs,
os << "}\n";
// Generate the per-shard op definitions.
- emitOpClassDefs(records, defs, os, indexStr);
+ emitOpClassDefs(records, defs, os, formatErrorIsFatal, indexStr);
}
/// Emit op definitions for all op records.
-bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
+bool emitOpDefs(const RecordKeeper &records, raw_ostream &os,
+ bool formatErrorIsFatal, const std::string &opIncFilter,
+ const std::string &opExcFilter, unsigned opShardCount) {
emitSourceFileHeader("Op Definitions", os, records);
- std::vector<const Record *> defs = getRequestedOpDefinitions(records);
+ std::vector<const Record *> defs =
+ getRequestedOpDefinitions(records, opIncFilter, opExcFilter);
SmallVector<ArrayRef<const Record *>, 4> shardedDefs;
- shardOpDefinitions(defs, shardedDefs);
+ shardOpDefinitions(defs, shardedDefs, opShardCount);
// If no shard was requested, emit the regular op list and class definitions.
if (shardedDefs.size() == 1) {
@@ -4695,7 +4709,7 @@ bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
}
{
IfDefScope scope("GET_OP_CLASSES", os);
- emitOpClassDefs(records, defs, os);
+ emitOpClassDefs(records, defs, os, formatErrorIsFatal);
}
return false;
}
@@ -4704,7 +4718,8 @@ bool emitOpDefs(const RecordKeeper &records, raw_ostream &os) {
return false;
Dialect dialect = Operator(defs.front()).getDialect();
for (auto [idx, value] : llvm::enumerate(shardedDefs)) {
- emitOpDefShard(records, value, dialect, idx, shardedDefs.size(), os);
+ emitOpDefShard(records, value, dialect, idx, shardedDefs.size(), os,
+ formatErrorIsFatal);
}
return false;
}
diff --git a/mlir/lib/TableGen/OpDocGen.cpp b/mlir/lib/TableGen/OpDocGen.cpp
index 395960cc600b78..d33fc067dce1b6 100644
--- a/mlir/lib/TableGen/OpDocGen.cpp
+++ b/mlir/lib/TableGen/OpDocGen.cpp
@@ -39,20 +39,6 @@ using namespace mlir;
using namespace mlir::tblgen;
using mlir::tblgen::Operator;
-//===----------------------------------------------------------------------===//
-// Commandline Options
-//===----------------------------------------------------------------------===//
-static cl::OptionCategory
- docCat("Options for -gen-(attrdef|typedef|enum|op|dialect)-doc");
-cl::opt<std::string>
- stripPrefix("strip-prefix",
- cl::desc("Strip prefix of the fully qualified names"),
- cl::init("::mlir::"), cl::cat(docCat));
-cl::opt<bool> allowHugoSpecificFeatures(
- "allow-hugo-specific-features",
- cl::desc("Allows using features specific to Hugo"), cl::init(false),
- cl::cat(docCat));
-
void mlir::tblgen::emitSummary(StringRef summary, raw_ostream &os) {
if (!summary.empty()) {
StringRef trimmed = summary.trim();
@@ -195,7 +181,9 @@ static StringRef resolveAttrDescription(const Attribute &attr) {
return description;
}
-static void emitOpDoc(const Operator &op, raw_ostream &os) {
+static void emitOpDoc(const Operator &op, raw_ostream &os,
+ const std::string &stripPrefix,
+ bool allowHugoSpecificFeatures) {
std::string classNameStr = op.getQualCppClassName();
StringRef className = classNameStr;
(void)className.consume_front(stripPrefix);
@@ -286,13 +274,17 @@ static void emitSourceLink(StringRef inputFilename, raw_ostream &os) {
<< inputFromMlirInclude << ")\n\n";
}
-void mlir::tblgen::emitOpDoc(const RecordKeeper &records, raw_ostream &os) {
- auto opDefs = getRequestedOpDefinitions(records);
+void mlir::tblgen::emitOpDoc(const RecordKeeper &records, raw_ostream &os,
+ const std::string &stripPrefix,
+ bool allowHugoSpecificFeatures,
+ const std::string &opIncFilter,
+ const std::string &opExcFilter) {
+ auto opDefs = getRequestedOpDefinitions(records, opIncFilter, opExcFilter);
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
emitSourceLink(records.getInputFilename(), os);
for (const Record *opDef : opDefs)
- ::emitOpDoc(Operator(opDef), os);
+ ::emitOpDoc(Operator(opDef), os, stripPrefix, allowHugoSpecificFeatures);
}
//===----------------------------------------------------------------------===//
@@ -448,7 +440,9 @@ static void maybeNest(bool nest, llvm::function_ref<void(raw_ostream &os)> fn,
static void emitBlock(ArrayRef<Attribute> attributes, StringRef inputFilename,
ArrayRef<AttrDef> attrDefs, ArrayRef<OpDocGroup> ops,
ArrayRef<Type> types, ArrayRef<TypeDef> typeDefs,
- ArrayRef<EnumAttr> enums, raw_ostream &os) {
+ ArrayRef<EnumAttr> enums, raw_ostream &os,
+ const std::string &stripPrefix,
+ bool allowHugoSpecificFeatures) {
if (!ops.empty()) {
os << "## Operations\n\n";
emitSourceLink(inputFilename, os);
@@ -463,7 +457,7 @@ static void emitBlock(ArrayRef<Attribute> attributes, StringRef inputFilename,
os << "\n\n";
}
for (const Operator &op : grouping.ops) {
- emitOpDoc(op, os);
+ emitOpDoc(op, os, stripPrefix, allowHugoSpecificFeatures);
}
},
os);
@@ -506,7 +500,9 @@ static void emitDialectDoc(const Dialect &dialect, StringRef inputFilename,
ArrayRef<Attribute> attributes,
ArrayRef<AttrDef> attrDefs, ArrayRef<OpDocGroup> ops,
ArrayRef<Type> types, ArrayRef<TypeDef> typeDefs,
- ArrayRef<EnumAttr> enums, raw_ostream &os) {
+ ArrayRef<EnumAttr> enums, raw_ostream &os,
+ const std::string &stripPrefix,
+ bool allowHugoSpecificFeatures) {
os << "# '" << dialect.getName() << "' Dialect\n\n";
emitIfNotEmpty(dialect.getSummary(), os);
emitIfNotEmpty(dialect.getDescription(), os);
@@ -517,18 +513,23 @@ static void emitDialectDoc(const Dialect &dialect, StringRef inputFilename,
os << "[TOC]\n\n";
emitBlock(attributes, inputFilename, attrDefs, ops, types, typeDefs, enums,
- os);
+ os, stripPrefix, allowHugoSpecificFeatures);
}
-bool mlir::tblgen::emitDialectDoc(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitDialectDoc(
+ const RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &selectedDialect,
+ const std::string &stripPrefix, bool allowHugoSpecificFeatures,
+ const std::string &opIncFilter, const std::string &opExcFilter) {
auto dialectDefs = records.getAllDerivedDefinitionsIfDefined("Dialect");
SmallVector<Dialect> dialects(dialectDefs.begin(), dialectDefs.end());
- std::optional<Dialect> dialect = findDialectToGenerate(dialects);
+ std::optional<Dialect> dialect =
+ findDialectToGenerate(dialects, selectedDialect);
if (!dialect)
return true;
- std::vector<const Record *> opDefs = getRequestedOpDefinitions(records);
+ std::vector<const Record *> opDefs =
+ getRequestedOpDefinitions(records, opIncFilter, opExcFilter);
auto attrDefs = records.getAllDerivedDefinitionsIfDefined("DialectAttr");
auto typeDefs = records.getAllDerivedDefinitionsIfDefined("DialectType");
auto typeDefDefs = records.getAllDerivedDefinitionsIfDefined("TypeDef");
@@ -603,6 +604,6 @@ bool mlir::tblgen::emitDialectDoc(const RecordKeeper &records,
os << "<!-- Autogenerated by mlir-tblgen; don't manually edit -->\n";
emitDialectDoc(*dialect, records.getInputFilename(), dialectAttrs,
dialectAttrDefs, dialectOps, dialectTypes, dialectTypeDefs,
- dialectEnums, os);
+ dialectEnums, os, stripPrefix, allowHugoSpecificFeatures);
return false;
}
diff --git a/mlir/lib/TableGen/OpFormatGen.cpp b/mlir/lib/TableGen/OpFormatGen.cpp
index 56c0e73034069f..d8445cdc81f901 100644
--- a/mlir/lib/TableGen/OpFormatGen.cpp
+++ b/mlir/lib/TableGen/OpFormatGen.cpp
@@ -3774,7 +3774,8 @@ LogicalResult OpFormatParser::verifyOptionalGroupElement(SMLoc loc,
//===----------------------------------------------------------------------===//
void mlir::tblgen::generateOpFormat(const Operator &constOp, OpClass &opClass,
- bool hasProperties) {
+ bool hasProperties,
+ bool formatErrorIsFatal) {
// TODO: Operator doesn't expose all necessary functionality via
// the const interface.
Operator &op = const_cast<Operator &>(constOp);
diff --git a/mlir/lib/TableGen/OpGenHelpers.cpp b/mlir/lib/TableGen/OpGenHelpers.cpp
index 4156427f9fc78c..71f52298c93804 100644
--- a/mlir/lib/TableGen/OpGenHelpers.cpp
+++ b/mlir/lib/TableGen/OpGenHelpers.cpp
@@ -21,21 +21,6 @@ using namespace llvm;
using namespace mlir;
using namespace mlir::tblgen;
-cl::OptionCategory opDefGenCat("Options for op definition generators");
-
-static cl::opt<std::string> opIncFilter(
- "op-include-regex",
- cl::desc("Regex of name of op's to include (no filter if empty)"),
- cl::cat(opDefGenCat));
-static cl::opt<std::string> opExcFilter(
- "op-exclude-regex",
- cl::desc("Regex of name of op's to exclude (no filter if empty)"),
- cl::cat(opDefGenCat));
-static cl::opt<unsigned> opShardCount(
- "op-shard-count",
- cl::desc("The number of shards into which the op classes will be divided"),
- cl::cat(opDefGenCat), cl::init(1));
-
static std::string getOperationName(const Record &def) {
auto prefix = def.getValueAsDef("opDialect")->getValueAsString("name");
auto opName = def.getValueAsString("opName");
@@ -45,7 +30,9 @@ static std::string getOperationName(const Record &def) {
}
std::vector<const Record *>
-mlir::tblgen::getRequestedOpDefinitions(const RecordKeeper &records) {
+mlir::tblgen::getRequestedOpDefinitions(const RecordKeeper &records,
+ const std::string &opIncFilter,
+ const std::string &opExcFilter) {
const Record *classDef = records.getClass("Op");
if (!classDef)
PrintFatalError("ERROR: Couldn't find the 'Op' class!\n");
@@ -87,7 +74,8 @@ bool mlir::tblgen::isPythonReserved(StringRef str) {
void mlir::tblgen::shardOpDefinitions(
ArrayRef<const Record *> defs,
- SmallVectorImpl<ArrayRef<const Record *>> &shardedDefs) {
+ SmallVectorImpl<ArrayRef<const Record *>> &shardedDefs,
+ unsigned opShardCount) {
assert(opShardCount > 0 && "expected a positive shard count");
if (opShardCount == 1) {
shardedDefs.push_back(defs);
diff --git a/mlir/lib/TableGen/OpPythonBindingGen.cpp b/mlir/lib/TableGen/OpPythonBindingGen.cpp
index d47e21702e0c34..b57d4f4ddaab45 100644
--- a/mlir/lib/TableGen/OpPythonBindingGen.cpp
+++ b/mlir/lib/TableGen/OpPythonBindingGen.cpp
@@ -275,18 +275,6 @@ def {0}({2}) -> {4}:
return _get_op_result_or_op_results({1}({3}))
)Py";
-static llvm::cl::OptionCategory
- clOpPythonBindingCat("Options for -gen-python-op-bindings");
-
-static llvm::cl::opt<std::string>
- clDialectName("bind-dialect",
- llvm::cl::desc("The dialect to run the generator for"),
- llvm::cl::init(""), llvm::cl::cat(clOpPythonBindingCat));
-
-static llvm::cl::opt<std::string> clDialectExtensionName(
- "dialect-extension", llvm::cl::desc("The prefix of the dialect extension"),
- llvm::cl::init(""), llvm::cl::cat(clOpPythonBindingCat));
-
using AttributeClasses = DenseMap<StringRef, StringRef>;
/// Checks whether `str` would shadow a generated variable or attribute
@@ -1027,8 +1015,10 @@ static void emitOpBindings(const Operator &op, raw_ostream &os) {
/// Emits bindings for the dialect specified in the command line, including file
/// headers and utilities. Returns `false` on success to comply with Tablegen
/// registration requirements.
-bool mlir::tblgen::emitAllPythonOps(const RecordKeeper &records,
- raw_ostream &os) {
+bool mlir::tblgen::emitAllPythonOps(
+ const RecordKeeper &records, raw_ostream &os,
+ const llvm::cl::opt<std::string> &clDialectName,
+ const llvm::cl::opt<std::string> &clDialectExtensionName) {
if (clDialectName.empty())
llvm::PrintFatalError("dialect name not provided");
diff --git a/mlir/lib/TableGen/PassCAPIGen.cpp b/mlir/lib/TableGen/PassCAPIGen.cpp
index ed958a857eeda5..078f753576ba30 100644
--- a/mlir/lib/TableGen/PassCAPIGen.cpp
+++ b/mlir/lib/TableGen/PassCAPIGen.cpp
@@ -24,15 +24,6 @@ using namespace mlir::tblgen;
using llvm::formatv;
using llvm::RecordKeeper;
-static llvm::cl::OptionCategory
- passGenCat("Options for -gen-pass-capi-header and -gen-pass-capi-impl");
-static llvm::cl::opt<std::string>
- groupName("prefix",
- llvm::cl::desc("The prefix to use for this group of passes. The "
- "form will be mlirCreate<prefix><passname>, the "
- "prefix can avoid conflicts across libraries."),
- llvm::cl::cat(passGenCat));
-
const char *const passDecl = R"(
/* Create {0} Pass. */
MLIR_CAPI_EXPORTED MlirPass mlirCreate{0}{1}(void);
@@ -60,7 +51,8 @@ const char *const fileFooter = R"(
/// Emit TODO
bool mlir::tblgen::emitPasssCAPIHeader(const RecordKeeper &records,
- raw_ostream &os) {
+ raw_ostream &os,
+ const std::string &groupName) {
os << fileHeader;
os << "// Registration for the entire group\n";
os << "MLIR_CAPI_EXPORTED void mlirRegister" << groupName
@@ -96,7 +88,8 @@ void mlirRegister{0}Passes(void) {{
)";
bool mlir::tblgen::emitPassCAPIImpl(const RecordKeeper &records,
- raw_ostream &os) {
+ raw_ostream &os,
+ const std::string &groupName) {
os << "/* Autogenerated by mlir-tblgen; don't manually edit. */";
os << formatv(passGroupRegistrationCode, groupName);
diff --git a/mlir/lib/TableGen/PassGen.cpp b/mlir/lib/TableGen/PassGen.cpp
index a7a4a106e18391..e452eaf5bd2722 100644
--- a/mlir/lib/TableGen/PassGen.cpp
+++ b/mlir/lib/TableGen/PassGen.cpp
@@ -24,11 +24,6 @@ using namespace mlir::tblgen;
using llvm::formatv;
using llvm::RecordKeeper;
-static llvm::cl::OptionCategory passGenCat("Options for -gen-pass-decls");
-static llvm::cl::opt<std::string>
- groupName("name", llvm::cl::desc("The name of this group of passes"),
- llvm::cl::cat(passGenCat));
-
/// Extract the list of passes from the TableGen records.
static std::vector<Pass> getPasses(const RecordKeeper &records) {
std::vector<Pass> passes;
@@ -141,7 +136,8 @@ static void emitPassDecls(const Pass &pass, raw_ostream &os) {
/// Emit the code for registering each of the given passes with the global
/// PassRegistry.
-static void emitRegistrations(llvm::ArrayRef<Pass> passes, raw_ostream &os) {
+static void emitRegistrations(llvm::ArrayRef<Pass> passes, raw_ostream &os,
+ const std::string &groupName) {
os << "#ifdef GEN_PASS_REGISTRATION\n";
for (const Pass &pass : passes) {
@@ -446,7 +442,8 @@ static void emitOldPassDecl(const Pass &pass, raw_ostream &os) {
os << "};\n";
}
-void mlir::tblgen::emitPassDecls(const RecordKeeper &records, raw_ostream &os) {
+void mlir::tblgen::emitPassDecls(const RecordKeeper &records, raw_ostream &os,
+ const std::string &groupName) {
std::vector<Pass> passes = getPasses(records);
os << "/* Autogenerated by mlir-tblgen; don't manually edit */\n";
@@ -461,7 +458,7 @@ void mlir::tblgen::emitPassDecls(const RecordKeeper &records, raw_ostream &os) {
for (const Pass &pass : passes)
emitPass(pass, os);
- emitRegistrations(passes, os);
+ emitRegistrations(passes, os, groupName);
// TODO: Drop old pass declarations.
// Emit the old code until all the passes have switched to the new design.
diff --git a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
index 82742412d94c83..373a8d540d516c 100644
--- a/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
+++ b/mlir/tools/mlir-tblgen/mlir-tblgen.cpp
@@ -16,7 +16,6 @@
#include "mlir/TableGen/Directive.h"
#include "mlir/TableGen/DocGenUtilities.h"
#include "mlir/TableGen/GenInfo.h"
-#include "mlir/TableGen/Pass.h"
#include "mlir/TableGen/Interfaces.h"
#include "mlir/TableGen/Pass.h"
#include "mlir/TableGen/Python.h"
@@ -44,16 +43,24 @@ static llvm::cl::opt<std::string>
llvm::cl::desc("Generate attributes for this dialect"),
llvm::cl::cat(attrdefGenCat), llvm::cl::CommaSeparated);
+/// Whether a failure in parsing the assembly format should be a fatal error.
+static llvm::cl::opt<bool> formatErrorIsFatal(
+ "asmformat-error-is-fatal",
+ llvm::cl::desc("Emit a fatal error if format parsing fails"),
+ llvm::cl::init(true));
+
static mlir::GenRegistration
genAttrDefs("gen-attrdef-defs", "Generate AttrDef definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- tblgen::AttrDefGenerator generator(records, os);
+ tblgen::AttrDefGenerator generator(records, os,
+ formatErrorIsFatal);
return generator.emitDefs(attrDialect);
});
static mlir::GenRegistration
genAttrDecls("gen-attrdef-decls", "Generate AttrDef declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- tblgen::AttrDefGenerator generator(records, os);
+ tblgen::AttrDefGenerator generator(records, os,
+ formatErrorIsFatal);
return generator.emitDecls(attrDialect);
});
@@ -70,13 +77,15 @@ static llvm::cl::opt<std::string>
static mlir::GenRegistration
genTypeDefs("gen-typedef-defs", "Generate TypeDef definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- tblgen::TypeDefGenerator generator(records, os);
+ tblgen::TypeDefGenerator generator(records, os,
+ formatErrorIsFatal);
return generator.emitDefs(typeDialect);
});
static mlir::GenRegistration
genTypeDecls("gen-typedef-decls", "Generate TypeDef declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- tblgen::TypeDefGenerator generator(records, os);
+ tblgen::TypeDefGenerator generator(records, os,
+ formatErrorIsFatal);
return generator.emitDecls(typeDialect);
});
@@ -99,26 +108,37 @@ static mlir::GenRegistration
// Bytecode registration hooks
//===----------------------------------------------------------------------===//
+static llvm::cl::OptionCategory dialectGenCat("Options for -gen-dialect-*");
+static cl::opt<std::string>
+ selectedBcDialect("bytecode-dialect", cl::desc("The dialect to gen for"),
+ cl::cat(dialectGenCat), cl::CommaSeparated);
+
static mlir::GenRegistration
genBCRW("gen-bytecode", "Generate dialect bytecode readers/writers",
[](const RecordKeeper &records, raw_ostream &os) {
- return tblgen::emitBCRW(records, os);
+ return tblgen::emitBCRW(records, os, selectedBcDialect);
});
//===----------------------------------------------------------------------===//
// GEN: Dialect registration hooks
//===----------------------------------------------------------------------===//
+static llvm::cl::opt<std::string>
+ selectedDialect("dialect", llvm::cl::desc("The dialect to gen for"),
+ llvm::cl::cat(dialectGenCat), llvm::cl::CommaSeparated);
+
static mlir::GenRegistration
genDialectDecls("gen-dialect-decls", "Generate dialect declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- return tblgen::emitDialectDecls(records, os);
+ return tblgen::emitDialectDecls(records, os,
+ selectedDialect);
});
static mlir::GenRegistration
genDialectDefs("gen-dialect-defs", "Generate dialect definitions",
[](const RecordKeeper &records, raw_ostream &os) {
- return tblgen::emitDialectDefs(records, os);
+ return tblgen::emitDialectDefs(records, os,
+ selectedDialect);
});
//===----------------------------------------------------------------------===//
@@ -144,6 +164,21 @@ static mlir::GenRegistration genDirectiveDecls(
// Python Enum registration hooks
//===----------------------------------------------------------------------===//
+static cl::OptionCategory opDefGenCat("Options for op definition generators");
+
+static cl::opt<std::string> opIncFilter(
+ "op-include-regex",
+ cl::desc("Regex of name of op's to include (no filter if empty)"),
+ cl::cat(opDefGenCat));
+static cl::opt<std::string> opExcFilter(
+ "op-exclude-regex",
+ cl::desc("Regex of name of op's to exclude (no filter if empty)"),
+ cl::cat(opDefGenCat));
+static cl::opt<unsigned> opShardCount(
+ "op-shard-count",
+ cl::desc("The number of shards into which the op classes will be divided"),
+ cl::cat(opDefGenCat), cl::init(1));
+
// Registers the enum utility generator to mlir-tblgen.
static mlir::GenRegistration
genPythonEnumBindings("gen-python-enum-bindings",
@@ -172,9 +207,35 @@ static mlir::GenRegistration
// LLVMIR registration hooks
//===----------------------------------------------------------------------===//
+static llvm::cl::OptionCategory intrinsicGenCat("Intrinsics Generator Options");
+
+static llvm::cl::opt<std::string>
+ nameFilter("llvmir-intrinsics-filter",
+ llvm::cl::desc("Only keep the intrinsics with the specified "
+ "substring in their record name"),
+ llvm::cl::cat(intrinsicGenCat));
+
+static llvm::cl::opt<std::string>
+ opBaseClass("dialect-opclass-base",
+ llvm::cl::desc("The base class for the ops in the dialect we "
+ "are planning to emit"),
+ llvm::cl::init("LLVM_IntrOp"), llvm::cl::cat(intrinsicGenCat));
+
+static llvm::cl::opt<std::string> accessGroupRegexp(
+ "llvmir-intrinsics-access-group-regexp",
+ llvm::cl::desc("Mark intrinsics that match the specified "
+ "regexp as taking an access group metadata"),
+ llvm::cl::cat(intrinsicGenCat));
+
+static llvm::cl::opt<std::string> aliasAnalysisRegexp(
+ "llvmir-intrinsics-alias-analysis-regexp",
+ llvm::cl::desc("Mark intrinsics that match the specified "
+ "regexp as taking alias.scopes, noalias, and tbaa metadata"),
+ llvm::cl::cat(intrinsicGenCat));
+
template <bool ConvertTo>
-bool emitLLVMIREnumConversionDefs(const RecordKeeper &records,
- raw_ostream &os) {
+static bool emitLLVMIREnumConversionDefs(const RecordKeeper &records,
+ raw_ostream &os) {
for (const Record *def : records.getAllDerivedDefinitions("LLVM_EnumAttr"))
if (ConvertTo)
tblgen::emitOneEnumToConversion(def, os);
@@ -220,9 +281,13 @@ static mlir::GenRegistration genConvertibleLLVMIRIntrinsics(
"Generate list of convertible LLVM IR intrinsics",
tblgen::emitConvertibleLLVMIRIntrinsics);
-static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
- "Generate LLVM IR intrinsics",
- tblgen::emitLLVMIRIntrinsics);
+static mlir::GenRegistration
+ genLLVMIRIntrinsics("gen-llvmir-intrinsics", "Generate LLVM IR intrinsics",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitLLVMIRIntrinsics(
+ records, os, nameFilter, accessGroupRegexp,
+ aliasAnalysisRegexp, opBaseClass);
+ });
//===----------------------------------------------------------------------===//
// OpenMP registration hooks
@@ -246,18 +311,33 @@ static mlir::GenRegistration
static mlir::GenRegistration
genOpDecls("gen-op-decls", "Generate op declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- return tblgen::emitOpDecls(records, os);
+ return tblgen::emitOpDecls(records, os, formatErrorIsFatal,
+ opIncFilter, opExcFilter,
+ opShardCount);
});
-static mlir::GenRegistration genOpDefs("gen-op-defs", "Generate op definitions",
- [](const RecordKeeper &records,
- raw_ostream &os) {
- return tblgen::emitOpDefs(records, os);
- });
+static mlir::GenRegistration
+ genOpDefs("gen-op-defs", "Generate op definitions",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitOpDefs(records, os, formatErrorIsFatal,
+ opIncFilter, opExcFilter,
+ opShardCount);
+ });
//===----------------------------------------------------------------------===//
// Op Doc Registration
//===----------------------------------------------------------------------===//
+static cl::OptionCategory
+ docCat("Options for -gen-(attrdef|typedef|enum|op|dialect)-doc");
+static cl::opt<std::string>
+ stripPrefix("strip-prefix",
+ cl::desc("Strip prefix of the fully qualified names"),
+ cl::init("::mlir::"), cl::cat(docCat));
+static cl::opt<bool> allowHugoSpecificFeatures(
+ "allow-hugo-specific-features",
+ cl::desc("Allows using features specific to Hugo"), cl::init(false),
+ cl::cat(docCat));
+
static mlir::GenRegistration
genAttrDocRegister("gen-attrdef-doc",
"Generate dialect attribute documentation",
@@ -269,7 +349,9 @@ static mlir::GenRegistration
static mlir::GenRegistration
genOpDocRegister("gen-op-doc", "Generate dialect documentation",
[](const RecordKeeper &records, raw_ostream &os) {
- tblgen::emitOpDoc(records, os);
+ tblgen::emitOpDoc(records, os, stripPrefix,
+ allowHugoSpecificFeatures, opIncFilter,
+ opExcFilter);
return false;
});
@@ -287,11 +369,13 @@ static mlir::GenRegistration
return false;
});
-static mlir::GenRegistration
- genDialectDocRegister("gen-dialect-doc", "Generate dialect documentation",
- [](const RecordKeeper &records, raw_ostream &os) {
- return tblgen::emitDialectDoc(records, os);
- });
+static mlir::GenRegistration genDialectDocRegister(
+ "gen-dialect-doc", "Generate dialect documentation",
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitDialectDoc(records, os, selectedDialect, stripPrefix,
+ allowHugoSpecificFeatures, opIncFilter,
+ opExcFilter);
+ });
//===----------------------------------------------------------------------===//
// Interface registration hooks
@@ -337,22 +421,52 @@ static InterfaceGenRegistration<tblgen::TypeInterfaceGenerator>
// Python bindings registration hooks
//===----------------------------------------------------------------------===//
+static llvm::cl::OptionCategory
+ clOpPythonBindingCat("Options for -gen-python-op-bindings");
+
+static llvm::cl::opt<std::string>
+ clDialectName("bind-dialect",
+ llvm::cl::desc("The dialect to run the generator for"),
+ llvm::cl::init(""), llvm::cl::cat(clOpPythonBindingCat));
+
+static llvm::cl::opt<std::string> clDialectExtensionName(
+ "dialect-extension", llvm::cl::desc("The prefix of the dialect extension"),
+ llvm::cl::init(""), llvm::cl::cat(clOpPythonBindingCat));
+
static GenRegistration
genPythonBindings("gen-python-op-bindings",
"Generate Python bindings for MLIR Ops",
- &tblgen::emitAllPythonOps);
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitAllPythonOps(
+ records, os, clDialectName, clDialectExtensionName);
+ });
//===----------------------------------------------------------------------===//
// Pass CAPI registration hooks
//===----------------------------------------------------------------------===//
-static mlir::GenRegistration genPassCAPIHeader("gen-pass-capi-header",
- "Generate pass C API header",
- &tblgen::emitPasssCAPIHeader);
+static llvm::cl::OptionCategory
+ passGenCat("Options for -gen-pass-capi-header and -gen-pass-capi-impl");
+static llvm::cl::opt<std::string>
+ groupName("prefix",
+ llvm::cl::desc("The prefix to use for this group of passes. The "
+ "form will be mlirCreate<prefix><passname>, the "
+ "prefix can avoid conflicts across libraries."),
+ llvm::cl::cat(passGenCat));
+
+static mlir::GenRegistration
+ genPassCAPIHeader("gen-pass-capi-header", "Generate pass C API header",
+
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitPasssCAPIHeader(records, os,
+ groupName);
+ });
static mlir::GenRegistration
genPassCAPIImpl("gen-pass-capi-impl", "Generate pass C API implementation",
- &tblgen::emitPassCAPIImpl);
+ [](const RecordKeeper &records, raw_ostream &os) {
+ return tblgen::emitPassCAPIImpl(records, os, groupName);
+ });
//===----------------------------------------------------------------------===//
// Pass Doc registration hooks
@@ -369,10 +483,16 @@ static mlir::GenRegistration
// Pass registration hooks
//===----------------------------------------------------------------------===//
+static llvm::cl::OptionCategory passDeclsGenCat("Options for -gen-pass-decls");
+static llvm::cl::opt<std::string>
+ groupNamePassDecls("name",
+ llvm::cl::desc("The name of this group of passes"),
+ llvm::cl::cat(passDeclsGenCat));
+
static mlir::GenRegistration
genPassDecls("gen-pass-decls", "Generate pass declarations",
[](const RecordKeeper &records, raw_ostream &os) {
- tblgen::emitPassDecls(records, os);
+ tblgen::emitPassDecls(records, os, groupNamePassDecls);
return false;
});
>From adfc46595b56f4d8e6cca16f9217cc62c5af9cfe Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 22:58:53 -0400
Subject: [PATCH 23/24] format
---
mlir/include/mlir/TableGen/Operator.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/mlir/include/mlir/TableGen/Operator.h b/mlir/include/mlir/TableGen/Operator.h
index b353afcea1de9a..9e570373d9cd32 100644
--- a/mlir/include/mlir/TableGen/Operator.h
+++ b/mlir/include/mlir/TableGen/Operator.h
@@ -422,8 +422,6 @@ class Operator {
bool allResultsHaveKnownTypes;
};
-
-
} // namespace tblgen
} // namespace mlir
>From e40dd266a682a75ff74b0fc15743bcd400a88b96 Mon Sep 17 00:00:00 2001
From: Maksim Levental <maksim.levental at gmail.com>
Date: Sat, 26 Oct 2024 23:05:34 -0400
Subject: [PATCH 24/24] remove unnecessary header
---
mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
index 11dc46d9458204..170ac2e7ba0dbb 100644
--- a/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
+++ b/mlir/lib/TableGen/LLVMIRIntrinsicGen.cpp
@@ -15,7 +15,6 @@
#include "mlir/TableGen/LLVMIR.h"
#include "llvm/ADT/SmallBitVector.h"
-#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/PrettyStackTrace.h"
#include "llvm/Support/Regex.h"
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