[Mlir-commits] [mlir] [MLIR] VectorEmulateNarrowType to support loading of unaligned vectors (PR #113411)

[llvmlistbot at llvm.org]

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+// RUN: mlir-opt --test-emulate-narrow-int="arith-compute-bitwidth=1 memref-load-bitwidth=8" --cse --split-input-file %s | FileCheck %s
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lialan wrote:

I am adding dynamic access supports in a followup PR.

https://github.com/llvm/llvm-project/pull/113411