[Mlir-commits] [mlir] [MLIR][NVVM] Add PTX predefined special registers (PR #112343)

[Pradeep Kumar]

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@@ -189,6 +202,13 @@ def NVVM_ClusterDim : NVVM_SpecialRangeableRegisterOp<"read.ptx.sreg.cluster.nct
 // Clock registers
 def NVVM_ClockOp : NVVM_SpecialRegisterOp<"read.ptx.sreg.clock">;
 def NVVM_Clock64Op : NVVM_SpecialRegisterOp<"read.ptx.sreg.clock64">;
+def NVVM_GlobalTimerOp : NVVM_SpecialRegisterOp<"read.ptx.sreg.globaltimer">;
+
+//===----------------------------------------------------------------------===//
+// envreg registers
+foreach index = !range(0, 32) in {
+  def NVVM_EnvReg # index # Op : NVVM_SpecialRegisterOp<"read.ptx.sreg.envreg" # index>;
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schwarzschild-radius wrote:

@grypp These are environment reigster initalised by the driver (http://sw-mobile-docs/CUDA/GPGPU/parallel-thread-execution/index.html#special-registers-envreg-32)

https://github.com/llvm/llvm-project/pull/112343