[Mlir-commits] [llvm] [mlir] [OpenMP][MLIR] Lowering aligned clause to LLVM IR (PR #111676)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Thu Oct 10 00:29:49 PDT 2024
https://github.com/harishch4 updated https://github.com/llvm/llvm-project/pull/111676
>From b3b8773774d002b34e44a9afac68c1a93043b299 Mon Sep 17 00:00:00 2001
From: harishch4 <harishcse44 at gmail.com>
Date: Wed, 9 Oct 2024 13:40:46 +0000
Subject: [PATCH 1/2] [OpenMP][MLIR] Lowering aligned clause to LLVM IR
---
.../OpenMP/OpenMPToLLVMIRTranslation.cpp | 18 ++++++
.../Target/LLVMIR/openmp-simd-aligned.mlir | 63 +++++++++++++++++++
2 files changed, 81 insertions(+)
create mode 100644 mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir
diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index 19d80fbbd699b0..8df144ad20be72 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -1872,6 +1872,24 @@ convertOmpSimd(Operation &opInst, llvm::IRBuilderBase &builder,
llvm::MapVector<llvm::Value *, llvm::Value *> alignedVars;
llvm::omp::OrderKind order = convertOrderKind(simdOp.getOrder());
+ llvm::BasicBlock *sourceBlock = builder.GetInsertBlock();
+ std::optional<ArrayAttr> alignmentValues = simdOp.getAlignments();
+ mlir::OperandRange operands = simdOp.getAlignedVars();
+ for (size_t i = 0; i < operands.size(); ++i) {
+ llvm::Value *alignment = nullptr;
+ llvm::Value *llvmVal = moduleTranslation.lookupValue(operands[i]);
+ llvm::Type *ty = llvmVal->getType();
+ if (auto intAttr = llvm::dyn_cast<IntegerAttr>((*alignmentValues)[i])) {
+ alignment = builder.getInt64(intAttr.getInt());
+ assert(ty->isPointerTy() && "Invalid type for aligned variable");
+ assert(alignment && "Invalid alignment value");
+ auto curInsert = builder.saveIP();
+ builder.SetInsertPoint(sourceBlock->getTerminator());
+ llvmVal = builder.CreateLoad(ty, llvmVal);
+ builder.restoreIP(curInsert);
+ alignedVars[llvmVal] = alignment;
+ }
+ }
ompBuilder->applySimd(loopInfo, alignedVars,
simdOp.getIfExpr()
? moduleTranslation.lookupValue(simdOp.getIfExpr())
diff --git a/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir b/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir
new file mode 100644
index 00000000000000..6cf12d79e69d03
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir
@@ -0,0 +1,63 @@
+// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s
+
+//CHECK-LABEL: define void @_QPsimd_aligned_pointer() {
+//CHECK: %[[A_PTR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8 }, i64 1, align 8
+//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_PTR]], align 8
+//CHECK: omp_loop.preheader: ; preds = %0
+//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
+llvm.func @_QPsimd_aligned_pointer() {
+ %1 = llvm.mlir.constant(1 : i64) : i64
+ %2 = llvm.alloca %1 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8)> {bindc_name = "x"} : (i64) -> !llvm.ptr
+ %3 = llvm.alloca %1 x i32 {bindc_name = "i", pinned} : (i64) -> !llvm.ptr
+ %4 = llvm.mlir.constant(1 : i32) : i32
+ %5 = llvm.mlir.constant(10 : i32) : i32
+ %6 = llvm.mlir.constant(1 : i32) : i32
+ omp.simd aligned(%2 : !llvm.ptr -> 256 : i64) {
+ omp.loop_nest (%arg0) : i32 = (%4) to (%5) inclusive step (%6) {
+ llvm.store %arg0, %3 : i32, !llvm.ptr
+ omp.yield
+ }
+ }
+ llvm.return
+}
+
+//CHECK-LABEL: define void @_QPsimd_aligned_cptr() {
+//CHECK: %[[A_CPTR:.*]] = alloca %_QM__fortran_builtinsT__builtin_c_ptr, i64 1, align 8
+//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_CPTR]], align 8
+//CHECK: omp_loop.preheader: ; preds = %0
+//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
+llvm.func @_QPsimd_aligned_cptr() {
+ %0 = llvm.mlir.constant(1 : i64) : i64
+ %1 = llvm.alloca %0 x !llvm.struct<"_QM__fortran_builtinsT__builtin_c_ptr", (i64)> {bindc_name = "a"} : (i64) -> !llvm.ptr
+ %2 = llvm.mlir.constant(1 : i64) : i64
+ %3 = llvm.alloca %2 x i32 {bindc_name = "i", pinned} : (i64) -> !llvm.ptr
+ %4 = llvm.mlir.constant(1 : i32) : i32
+ %5 = llvm.mlir.constant(10 : i32) : i32
+ %6 = llvm.mlir.constant(1 : i32) : i32
+ omp.simd aligned(%1 : !llvm.ptr -> 256 : i64) {
+ omp.loop_nest (%arg0) : i32 = (%4) to (%5) inclusive step (%6) {
+ llvm.store %arg0, %3 : i32, !llvm.ptr
+ omp.yield
+ }
+ }
+ llvm.return
+}
+
+//CHECK-LABEL: define void @_QPsimd_aligned_allocatable() {
+//CHECK: %[[A_ADDR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 8
+//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_ADDR]], align 8
+//CHECK: omp_loop.preheader: ; preds = %0
+//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
+llvm.func @_QPsimd_aligned_allocatable() {
+ %0 = llvm.mlir.constant(1 : i64) : i64
+ %1 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {bindc_name = "a"} : (i64) -> !llvm.ptr
+ %2 = llvm.mlir.constant(1 : i32) : i32
+ %3 = llvm.mlir.constant(10 : i32) : i32
+ %4 = llvm.mlir.constant(1 : i32) : i32
+ omp.simd aligned(%1 : !llvm.ptr -> 256 : i64) {
+ omp.loop_nest (%arg0) : i32 = (%2) to (%3) inclusive step (%4) {
+ omp.yield
+ }
+ }
+ llvm.return
+}
>From e77381e02aa021e67da10019393bcb8d5b32a407 Mon Sep 17 00:00:00 2001
From: Harish Chambeti <harishcse44 at gmail.com>
Date: Thu, 10 Oct 2024 12:59:34 +0530
Subject: [PATCH 2/2] insertpoint fix
---
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 3 ++-
mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir | 6 +++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
index 47cc6ff7655caf..12440ab1e2615f 100644
--- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
@@ -5206,10 +5206,11 @@ void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop,
Loop *L = LI.getLoopFor(CanonicalLoop->getHeader());
if (AlignedVars.size()) {
InsertPointTy IP = Builder.saveIP();
- Builder.SetInsertPoint(CanonicalLoop->getPreheader()->getTerminator());
for (auto &AlignedItem : AlignedVars) {
Value *AlignedPtr = AlignedItem.first;
Value *Alignment = AlignedItem.second;
+ Instruction *loadInst = dyn_cast<Instruction>(AlignedPtr);
+ Builder.SetInsertPoint(loadInst->getNextNode());
Builder.CreateAlignmentAssumption(F->getDataLayout(),
AlignedPtr, Alignment);
}
diff --git a/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir b/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir
index 6cf12d79e69d03..f418742ef5dfa8 100644
--- a/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir
@@ -3,7 +3,6 @@
//CHECK-LABEL: define void @_QPsimd_aligned_pointer() {
//CHECK: %[[A_PTR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8 }, i64 1, align 8
//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_PTR]], align 8
-//CHECK: omp_loop.preheader: ; preds = %0
//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
llvm.func @_QPsimd_aligned_pointer() {
%1 = llvm.mlir.constant(1 : i64) : i64
@@ -17,6 +16,7 @@ llvm.func @_QPsimd_aligned_pointer() {
llvm.store %arg0, %3 : i32, !llvm.ptr
omp.yield
}
+ omp.terminator
}
llvm.return
}
@@ -24,7 +24,6 @@ llvm.func @_QPsimd_aligned_pointer() {
//CHECK-LABEL: define void @_QPsimd_aligned_cptr() {
//CHECK: %[[A_CPTR:.*]] = alloca %_QM__fortran_builtinsT__builtin_c_ptr, i64 1, align 8
//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_CPTR]], align 8
-//CHECK: omp_loop.preheader: ; preds = %0
//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
llvm.func @_QPsimd_aligned_cptr() {
%0 = llvm.mlir.constant(1 : i64) : i64
@@ -39,6 +38,7 @@ llvm.func @_QPsimd_aligned_cptr() {
llvm.store %arg0, %3 : i32, !llvm.ptr
omp.yield
}
+ omp.terminator
}
llvm.return
}
@@ -46,7 +46,6 @@ llvm.func @_QPsimd_aligned_cptr() {
//CHECK-LABEL: define void @_QPsimd_aligned_allocatable() {
//CHECK: %[[A_ADDR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 8
//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_ADDR]], align 8
-//CHECK: omp_loop.preheader: ; preds = %0
//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
llvm.func @_QPsimd_aligned_allocatable() {
%0 = llvm.mlir.constant(1 : i64) : i64
@@ -58,6 +57,7 @@ llvm.func @_QPsimd_aligned_allocatable() {
omp.loop_nest (%arg0) : i32 = (%2) to (%3) inclusive step (%4) {
omp.yield
}
+ omp.terminator
}
llvm.return
}
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