[Mlir-commits] [mlir] [mlir][gpu] Add address space modifier to Barrier (PR #110527)

[llvmlistbot at llvm.org]

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@@ -1371,11 +1372,25 @@ def GPU_BarrierOp : GPU_Op<"barrier"> {
     accessing the same memory can be avoided by synchronizing work items
     in-between these accesses.
 
+    The address space of visible memory accesses can be modified by adding a
+    list of address spaces required to be visible. By default all address spaces
+    are included.
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FMarno wrote:

I think that description basically covers it, but I would move a couple things around. Also I wouldn't say that `memfence` necessary weakens the memory fencing requirement, but it can be used for that.

https://github.com/llvm/llvm-project/pull/110527