[Mlir-commits] [mlir] Allow 16 bit floating point operand for LLVM_AtomicRMWOp (PR #110553)
Giuseppe Rossini
llvmlistbot at llvm.org
Tue Oct 1 13:55:43 PDT 2024
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@@ -139,6 +139,16 @@ class LLVM_VectorOf<Type element> : Type<
class LLVM_ScalarOrVectorOf<Type element> :
AnyTypeOf<[element, LLVM_VectorOf<element>]>;
+// Type constraint accepting an LLVM fixed vector type with an additional constraint
+// on the vector element type.
+class LLVM_FixedVectorOf<Type element> : Type<
+ And<[LLVM_AnyFixedVector.predicate,
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giuseros wrote:
I think you can use `LLVM_AnyFixedVector` : https://github.com/llvm/llvm-project/blob/f3c408d1726f6a921212faf68085f68bf8533f0c/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td#L119
https://github.com/llvm/llvm-project/pull/110553
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