[Mlir-commits] [mlir] [MLIR][ROCDL] Remove patterns for ops supported as intrinsics in the AMDGPU backend (PR #102971)

[Adrian Kuegel]

akuegel wrote:

> That is to say, there is no bf16 `exp` or `log` and they need to be rewritten to their f32 counterparts

Yes, and that is also done in this pass, but due to this PR it says there is no lowering pattern for F32. Reverting this Patch would fix it.

https://github.com/llvm/llvm-project/pull/102971