[Mlir-commits] [mlir] [mlir][vector] Add verification for incorrect vector.extract (PR #115824)

Kunwar Grover llvmlistbot at llvm.org
Thu Nov 21 07:23:19 PST 2024


Groverkss wrote:

> A few minor comments inline and one request below, but otherwise LGTM. Thanks for the discussion!
> 
> This PR restricts vector.extract/vector.insert operations to ensure that 0-D vectors are only allowed when the "other" input is either:
> 
> * A 0-D vector, or
> * An n-D vector with more than 1 element (e.g., `vector<8xf32>`).
> 
> Examples:
> 
> ```mlir
> // Valid
> vector.extract %src_1[0]: vector<f32> from vector<8xf32>
> 
> // Invalid
> vector.extract %src_2[0]: vector<f32> from vector<1xf32>
> ```
> 
> To me, this feels like a stepping stone toward further restricting (or even removing) the usage of 0-D vectors, which I fully support.
> 
> However, I found the behavior somewhat confusing initially. To improve clarity:
> 
> * Consider making the restrictions more explicit in `verifyInsertExtractIndicesAndShapes`.
> * Update the operation description in VectorOps.td to reflect this behavior.

Is

```
vector.extract %src_1[0]: vector<f32> from vector<8xf32>
```

allowed now? This seems really weird. Can you please wait one or two days before landing this so I can have a look at it better? Thanks!

https://github.com/llvm/llvm-project/pull/115824


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