[Mlir-commits] [mlir] [mlir][vector] Fix 0-d vector transfer mask inference (PR #116526)

[Andrzej Warzyński]

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@@ -1752,6 +1752,22 @@ func.func @vector_mask_non_maskable_op(%a : vector<3x4xf32>) -> vector<3x4xf32>
 
 // -----
 
+// We can support 0-D masks if eventually needed.
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banach-space wrote:

[nit] Why not add this comment where this restriction is enforced? https://github.com/llvm/llvm-project/blob/4b50ec43d03d9ba9b43edd9a4743951f6498b964/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td#L2509-L2510 

And to the Op docs :) 

https://github.com/llvm/llvm-project/pull/116526