[Mlir-commits] [mlir] [mlir][vector] Restrict narrow-type-emulation patterns (PR #115612)

Andrzej WarzyƄski llvmlistbot at llvm.org
Mon Nov 11 07:19:28 PST 2024


banach-space wrote:

> Feels like it could be much easier to add a new pass to decompose higher dimensional vector loads/stores into 1d loads and stores before this pass. Existing code in `VectorEmulateNarrowTypes` is already hard to swallow.

Sure, but that won't change the fact that the current logic is buggy in the case that I highlighted:
> 2-D memref + 2-D vector.

As in, even if such a pass was added, we'd still want to make sure that this code fails gracefully for cases are not supported.

https://github.com/llvm/llvm-project/pull/115612


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