[Mlir-commits] [mlir] [mlir][vector] Restrict narrow-type-emulation patterns (PR #115612)

[llvmlistbot at llvm.org]

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@@ -225,6 +225,10 @@ struct ConvertVectorStore final : OpConversionPattern<vector::StoreOp> {
   matchAndRewrite(vector::StoreOp op, OpAdaptor adaptor,
                   ConversionPatternRewriter &rewriter) const override {
 
+    if (op.getValueToStore().getType().getRank() != 1)
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MaheshRavishankar wrote:

This might be a bug. Multi-dimensional vector.store should be supported, but there might be a bug... 

See comment below. It is explicitly written for multi-dimensional loads. The only general way to emulate sub-byte loads is to linearize the memrefs and do a linear store. So during the emulation the destination memref and the source vector get converted to 1D before the store.

I am not opposed to having this, but seems too big a hammer. There is a bug here for multi-dimensional stores 

https://github.com/llvm/llvm-project/pull/115612