[Mlir-commits] [mlir] [MLIR][SPIRV] Add definition and (de)serialization for cache controls (PR #115461)
Victor Perez
llvmlistbot at llvm.org
Fri Nov 8 07:56:03 PST 2024
================
@@ -226,6 +226,28 @@ spirv::Deserializer::processMemoryModel(ArrayRef<uint32_t> operands) {
return success();
}
+template <typename AttrTy, typename EnumAttrTy, typename EnumTy>
+LogicalResult deserializeCacheControlDecoration(
+ Location loc, OpBuilder &opBuilder,
+ DenseMap<uint32_t, NamedAttrList> &decorations, ArrayRef<uint32_t> words,
+ StringAttr symbol, StringRef decorationName, StringRef cacheControlKind) {
+ if (words.size() != 4) {
+ return emitError(loc, "OpDecoration with ")
+ << decorationName << "needs a cache control integer literal and a "
+ << cacheControlKind << " cache control literal";
+ }
+ unsigned cacheLevel = words[2];
+ auto cacheControlAttr = static_cast<EnumTy>(words[3]);
+ auto value = opBuilder.getAttr<AttrTy>(cacheLevel, cacheControlAttr);
+ SmallVector<Attribute> attrs;
+ if (auto attrList =
+ llvm::dyn_cast_or_null<ArrayAttr>(decorations[words[0]].get(symbol)))
+ attrs.append(attrList.begin(), attrList.end());
----------------
victor-eds wrote:
I always forget about the name. Thanks!
https://github.com/llvm/llvm-project/pull/115461
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