[Mlir-commits] [mlir] [MLIR][Affine]Fixed crash with invalid cachesize (Issue #64979) (PR #114722)

[llvmlistbot at llvm.org]

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@@ -173,6 +173,12 @@ void LoopTiling::getTileSizes(ArrayRef<AffineForOp> band,
 }
 
 void LoopTiling::runOnOperation() {
+  if (cacheSizeInKiB <= 0) {
+    getOperation().emitError(
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SwapnilGhanshyala wrote:

Thank you for the pointers! Changes made to in the new commit.

https://github.com/llvm/llvm-project/pull/114722