[Mlir-commits] [mlir] [MLIR][Affine]Fixed crash with invalid cachesize (Issue #64979) (PR #114722)
Longsheng Mou
llvmlistbot at llvm.org
Sun Nov 3 18:01:41 PST 2024
================
@@ -173,6 +173,12 @@ void LoopTiling::getTileSizes(ArrayRef<AffineForOp> band,
}
void LoopTiling::runOnOperation() {
+ if (cacheSizeInKiB <= 0) {
+ getOperation().emitError(
----------------
CoTinker wrote:
I think use `mlir::emitError` is better, and `cacheSizeInKiB` is uint64_t, it's not less than zero. Maybe you can change it to:
```
if (cacheSizeInKiB == 0) {
mlir::emitError(mlir::UnknownLoc::get(&Pass::getContext()),
"cache size cannot be 0");
}
```
And please add a test. You can refer to #68762.
https://github.com/llvm/llvm-project/pull/114722
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