[Mlir-commits] [mlir] 435114f - [mlir][test] Rename Vector integration tests for CPU (nfc) (#93521)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Thu May 30 10:06:48 PDT 2024
Author: Andrzej Warzyński
Date: 2024-05-30T18:06:43+01:00
New Revision: 435114f9fe2139bec770e5a95799f4eab20639e7
URL: https://github.com/llvm/llvm-project/commit/435114f9fe2139bec770e5a95799f4eab20639e7
DIFF: https://github.com/llvm/llvm-project/commit/435114f9fe2139bec770e5a95799f4eab20639e7.diff
LOG: [mlir][test] Rename Vector integration tests for CPU (nfc) (#93521)
To keep the test filenames consistent, this patch:
* removes "test-" from file names (there used to be a mix of
"test-feature-1.mlir" and "feature-2.mlir"),
* replaces "_" with "-" (there used to be a mix of "feature-3.mlir"
and "feature_4.mlir").
Only files under test/Integration/Dialect/Vector/CPU are updated.
Added:
mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/inline-asm-vector-avx512.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/broadcast.mlir
mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/constant-mask.mlir
mlir/test/Integration/Dialect/Vector/CPU/contraction.mlir
mlir/test/Integration/Dialect/Vector/CPU/create-mask-v4i1.mlir
mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
mlir/test/Integration/Dialect/Vector/CPU/extract-strided-slice.mlir
mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
mlir/test/Integration/Dialect/Vector/CPU/fma.mlir
mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
mlir/test/Integration/Dialect/Vector/CPU/index-vectors.mlir
mlir/test/Integration/Dialect/Vector/CPU/insert-strided-slice.mlir
mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
mlir/test/Integration/Dialect/Vector/CPU/print-fp.mlir
mlir/test/Integration/Dialect/Vector/CPU/print-int.mlir
mlir/test/Integration/Dialect/Vector/CPU/print-str.mlir
mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-f64.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-i4.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-i64.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-si4.mlir
mlir/test/Integration/Dialect/Vector/CPU/reductions-ui4.mlir
mlir/test/Integration/Dialect/Vector/CPU/rewrite-narrow-types.mlir
mlir/test/Integration/Dialect/Vector/CPU/scan.mlir
mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
mlir/test/Integration/Dialect/Vector/CPU/shape-cast.mlir
mlir/test/Integration/Dialect/Vector/CPU/shuffle.mlir
mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
mlir/test/Integration/Dialect/Vector/CPU/sparse-dot-matvec.mlir
mlir/test/Integration/Dialect/Vector/CPU/sparse-saxpy-jagged-matvec.mlir
mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
mlir/test/Integration/Dialect/Vector/CPU/transpose.mlir
Modified:
Removed:
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf-full.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-full.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-dot.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-rsqrt.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-broadcast.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-constant-mask.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-contraction.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-create-mask-v4i1.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-create-mask.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-expand.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-extract-strided-slice.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-flat-transpose-col.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-flat-transpose-row.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-fma.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-gather.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-index-vectors.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-insert-strided-slice.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-interleave.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-maskedload.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-maskedstore.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-matrix-multiply-col.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-matrix-multiply-row.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-outerproduct-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-outerproduct-i64.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-print-fp.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-print-int.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-print-str.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-realloc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i4.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i64.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-si4.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-ui4.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-rewrite-narrow-types.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-scan.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-scatter.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-shape-cast.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-shuffle.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-shuffle16x16.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-sparse-dot-matvec.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-sparse-saxpy-jagged-matvec.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-1d.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-3d.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-to-loops.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-write.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transpose.mlir
################################################################################
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir b/mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf-full.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf-full.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-full.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-full.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-dot.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-dot.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/inline-asm-vector-avx512.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/inline-asm-vector-avx512.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-rsqrt.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-rsqrt.mlir
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