[Mlir-commits] [mlir] [mlir][emitc] Lower arith.andi, arith.ori, arith.xori to EmitC (PR #93666)
Simon Camphausen
llvmlistbot at llvm.org
Wed May 29 05:44:32 PDT 2024
================
@@ -40,6 +40,29 @@ class ArithConstantOpConversionPattern
}
};
+/// Check if the signedness of type \p ty matches the expected
+/// signedness, and issue a type with the correct signedness if
+/// necessary.
+Type adaptIntegralTypeSignedness(Type ty, bool needsUnsigned) {
+ if (isa<IntegerType>(ty)) {
+ // Turns signless integers into signed integers.
+ if (ty.isUnsignedInteger() != needsUnsigned) {
+ auto signedness = needsUnsigned
+ ? IntegerType::SignednessSemantics::Unsigned
+ : IntegerType::SignednessSemantics::Signed;
+ return IntegerType::get(ty.getContext(), ty.getIntOrFloatBitWidth(),
+ signedness);
+ }
+ }
+ return ty;
+}
+
+/// Insert a cast operation to type \p ty if \p val
+/// does not have this type.
----------------
simon-camp wrote:
Can you reformat this. Looks like it fits into one line.
https://github.com/llvm/llvm-project/pull/93666
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