[Mlir-commits] [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

Yaxun Liu llvmlistbot at llvm.org
Mon May 27 11:23:07 PDT 2024


================
@@ -368,7 +368,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   IntTy = llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getIntWidth());
   IntPtrTy = llvm::IntegerType::get(LLVMContext,
     C.getTargetInfo().getMaxPointerWidth());
-  Int8PtrTy = llvm::PointerType::get(LLVMContext, 0);
+  Int8PtrTy = llvm::PointerType::get(LLVMContext,
----------------
yxsamliu wrote:

This seems to cause regressions for HIP -fsanitize=address.

Basically rocm device library for ASAN is compiled from OpenCL source code, for which the default address space is mapped to addr space 5 in IR. Int8PtrTy  is used to determine the pointer type in the llvm.compiler.used global array, which causes the pointers in that array to be in addr space 5. However, for HIP those are in addr space 0. The variable from different bitcode are appended together by the linker. The linker checks their type and emits error since they do not match.

https://godbolt.org/z/s48fTj7Pv

Before this change, the pointers are in addr space 0 for both HIP and OpenCL, therefore no such issue.

https://github.com/llvm/llvm-project/pull/88182


More information about the Mlir-commits mailing list