[Mlir-commits] [mlir] 7c137f7 - [mlir][nvvm] Remove unused check-ptx (#93147)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Thu May 23 03:09:55 PDT 2024


Author: Guray Ozen
Date: 2024-05-23T12:09:51+02:00
New Revision: 7c137f7e510c0fcc1bfa46f8c85063c2a2b190dd

URL: https://github.com/llvm/llvm-project/commit/7c137f7e510c0fcc1bfa46f8c85063c2a2b190dd
DIFF: https://github.com/llvm/llvm-project/commit/7c137f7e510c0fcc1bfa46f8c85063c2a2b190dd.diff

LOG: [mlir][nvvm] Remove unused check-ptx (#93147)

The test used the check generated ptx with `CHECK-PTX`, but does not
check that anymore. The PR removes these lines.

Added: 
    

Modified: 
    mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir b/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
index 2e59b7234e53d..391fda82e1e19 100644
--- a/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
+++ b/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
@@ -6,15 +6,6 @@
 // RUN:   --entry-point-result=void \
 // RUN:  | FileCheck %s
 
-// Basic PTX check to make sure we are generating the right instructions.
-
-// CHECK-PTX: mbarrier.init.shared.b64
-// CHECK-PTX: mbarrier.arrive.expect_tx.shared.b64
-// CHECK-PTX: cp.async.bulk.tensor.2d.shared::cluster.global.mbarrier::complete_tx::bytes
-// CHECK-PTX: cp.async.bulk.tensor.2d.shared::cluster.global.mbarrier::complete_tx::bytes
-// CHECK-PTX: mbarrier.arrive.expect_tx.shared.b64
-// CHECK-PTX: mbarrier.try_wait.parity.shared.b64
-
 // RUN: mlir-opt %s --convert-nvgpu-to-nvvm \
 // RUN:         -gpu-kernel-outlining \
 // RUN:         -convert-nvvm-to-llvm \


        


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