[Mlir-commits] [mlir] [mlir][emitc] Add EmitC lowering for arith.trunci, arith.extsi, arith.extui (PR #91491)

[Corentin Ferry]

cferry-AMD wrote:

I would do just the unsigned extension: I don't think it makes sense to interpret the only bit of an i1 as a sign bit (then what's its value?)... then the other choice would be to see a 1 as `+1`, which needs no sign extension to be preserved. 

Now assuming we still sign-extend: as an alternative to the `or` you suggest, we could go unsigned to i8, do `x | 0x7E`, and then perform regular sign-extension with a cast. That would let us work e.g. with index types, which bitwidth is unspecified.

https://github.com/llvm/llvm-project/pull/91491