[Mlir-commits] [mlir] [MLIR][Vector] Implement transferXXPermutationLowering as MaskableOpRewritePattern (PR #91987)

Andrzej Warzyński llvmlistbot at llvm.org
Mon May 20 12:46:44 PDT 2024


banach-space wrote:

We are on the same page here, thanks for seeing this through!

 One thing that this discussion makes me question - should `vector.mask` allow memref semantics? Is that needed at all? I’m leaning towards “no”, but that’s a discussion for a different PR.

https://github.com/llvm/llvm-project/pull/91987


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