[Mlir-commits] [mlir] [mlir][vector] Add deinterleave operation to vector dialect (PR #92409)
Benjamin Maxwell
llvmlistbot at llvm.org
Fri May 17 08:37:23 PDT 2024
================
@@ -543,6 +543,82 @@ def Vector_InterleaveOp :
}];
}
+class ResultIsHalfSourceVectorType<string result> : TypesMatchWith<
+ "type of 'input' is double the width of results",
+ "input", result,
+ [{
+ [&]() -> ::mlir::VectorType {
+ auto vectorType = ::llvm::cast<mlir::VectorType>($_self);
+ ::mlir::VectorType::Builder builder(vectorType);
+ auto lastDim = vectorType.getRank() - 1;
+ auto newDimSize = vectorType.getDimSize(lastDim) / 2;;
+ if (newDimSize <= 0)
+ return vectorType; // (invalid input type)
+ return builder.setDim(lastDim, newDimSize);
+ }()
+ }]
+>;
+
+def Vector_DeinterleaveOp :
+ Vector_Op<"deinterleave", [Pure,
+ PredOpTrait<"trailing dimension of input vector must be an even number",
+ CPred<[{
+ [&](){
+ auto srcVec = getSourceVectorType();
+ return srcVec.getDimSize(srcVec.getRank() - 1) % 2 == 0;
+ }()
+ }]>>,
+ ResultIsHalfSourceVectorType<"res1">,
+ ResultIsHalfSourceVectorType<"res2">,
+ AllTypesMatch<["res1", "res2"]>
+ ]> {
+ let summary = "constructs two vectors by deinterleaving an input vector";
+ let description = [{
+ The deinterleave operation constructs two vectors from a single input
+ vector. The first result vector contains the elements from even lanes
+ of the input, and the second contains elements from odd lanes. This is
+ the inverse of a 'vector.interleave' operation.
+
+ Each output's trailing dimension is half of the size of the input
+ vector's trailing dimension. This operation requires the input vector
+ to have a rank > 0 and an even number of elements in its trailing
+ dimension.
+
+ The operation supports scalable vectors.
+
+ Example:
+ ```mlir
+ %0 = vector.deinterleave %a
+ : vector<[4]xi32> ; yields vector<[2]xi32>, vector<[2]xi32>
+ %1 = vector.deinterleave %b
+ : vector<8xi8> ; yields vector<4xi8>, vector<4xi8>
+ %2 = vector.deinterleave %c
+ : vector<2x8xf32> ; yields vector<2x4xf32>, vector<2x4xf32>
+ %3 = vector.deinterleave %d
+ : vector<2x4x[6]xf64> ; yields vector<2x4x[3]xf64>, vector<2x4x[3]xf64>
----------------
MacDue wrote:
The docs should show this returns two results (I don't think assigning it to one value is valid):
```suggestion
%0, %1 = vector.deinterleave %a
: vector<[4]xi32> ; yields vector<[2]xi32>, vector<[2]xi32>
%2, %3 = vector.deinterleave %b
: vector<8xi8> ; yields vector<4xi8>, vector<4xi8>
%4, %5 = vector.deinterleave %c
: vector<2x8xf32> ; yields vector<2x4xf32>, vector<2x4xf32>
%6, %7 = vector.deinterleave %d
: vector<2x4x[6]xf64> ; yields vector<2x4x[3]xf64>, vector<2x4x[3]xf64>
```
https://github.com/llvm/llvm-project/pull/92409
More information about the Mlir-commits
mailing list