[Mlir-commits] [mlir] [MLIR][Vector] Implement TransferReadOfExtractSliceOp as MaskableOpRewritePattern (PR #91960)

[Andrzej Warzyński]

================
@@ -75,6 +75,21 @@ func.func @transfer_read_of_extract_slice_non_leading_rank_reduction(%t : tensor
   return %1 : vector<5x6xf32>
 }
 
+// CHECK-LABEL: func @masked_transfer_read_of_extract_slice
+//  CHECK-SAME:     %[[t:.*]]: tensor<?x?xf32>, %[[s1:.*]]: index, %[[s2:.*]]: index
+//       CHECK-DAG: %[[m:.*]] = vector.create_mask{{.*}} : vector<5x6xi1>
+//       CHECK-DAG: %[[a:.*]] = affine.apply {{.*}}[[s1]]
+//       CHECK: vector.mask %[[m]] { vector.transfer_read %[[t]]{{.*}}: tensor<?x?xf32>, vector<5x6xf32> } : vector<5x6xi1> -> vector<5x6xf32>
----------------
banach-space wrote:

[nit] Align check-lines :)

```suggestion
// CHECK-LABEL: func @masked_transfer_read_of_extract_slice
//  CHECK-SAME:     %[[t:.*]]: tensor<?x?xf32>, %[[s1:.*]]: index, %[[s2:.*]]: index
//   CHECK-DAG: %[[m:.*]] = vector.create_mask{{.*}} : vector<5x6xi1>
//   CHECK-DAG: %[[a:.*]] = affine.apply {{.*}}[[s1]]
//       CHECK: vector.mask %[[m]] { vector.transfer_read %[[t]]{{.*}}: tensor<?x?xf32>, vector<5x6xf32> } : vector<5x6xi1> -> vector<5x6xf32>
```

https://github.com/llvm/llvm-project/pull/91960