[Mlir-commits] [mlir] [mlir][ArmSME] Add comments in tile-spills-and-fills.mlir (PR #91450)

[Benjamin Maxwell]

================
@@ -76,13 +76,23 @@ func.func @use_too_many_tiles() {
 // AFTER-LLVM-LOWERING-SAME:   {arm_sme.in_memory_tile_id = 16 : i32} : memref<?x?xi16>
 //
 //  AFTER-LLVM-LOWERING-NOT: scf.for
-//                           Note: 17 is the mask for the 32-bit tile 0.
+
+///     1. Create/allocate %0
+///        Note: 17 is the mask for the 32-bit tile 0.
+
 //      AFTER-LLVM-LOWERING: "arm_sme.intr.zero"() <{tile_mask = 17 : i32}>
 //
 //  AFTER-LLVM-LOWERING-NOT: scf.for
-//                           Note: 34 is the mask for the 32-bit tile 1.
+
+///     2. Create/allocate %1
+///        Note: 34 is the mask for the 32-bit tile 1.
+
 //      AFTER-LLVM-LOWERING: "arm_sme.intr.zero"() <{tile_mask = 34 : i32}>
-//
+
+///     3. Spill %0 (the 32-bit tile 0), so that %2 can be allocated (16 bit
+///        tile 0). Note that this is spilling vector<[8]x[8]xi16> rather than
+///        vector<[4]x[4]xi32>
----------------
MacDue wrote:

Not really accurate. This does not work via spill + reload. It always just does `swap(<inMemoryTile>, tile zero)` (even when it could do less). 

https://github.com/llvm/llvm-project/pull/91450