[Mlir-commits] [mlir] [mlir][sparse] force a properly sized view on pos/crd/val under codegen (PR #91288)
Aart Bik
llvmlistbot at llvm.org
Mon May 6 19:23:10 PDT 2024
https://github.com/aartbik updated https://github.com/llvm/llvm-project/pull/91288
>From 234012bfbcdb1076130955e3abf53880e1230c25 Mon Sep 17 00:00:00 2001
From: Aart Bik <ajcbik at google.com>
Date: Mon, 6 May 2024 18:42:19 -0700
Subject: [PATCH 1/3] [mlir][sparse] force a properly sized view on pos/crd/val
under codegen
Codegen "vectors" for pos/crd/val use the capacity as memref size, not
the actual used size. Although the sparsifier itself always uses just
the defined pos/crd/val parts, printing these and passing them back
to a runtime environment could benefit from wrapping the basic
pos/crd/val getters into a proper memref view that sets the right size.
---
.../Transforms/SparseTensorCodegen.cpp | 45 +++--
.../Dialect/SparseTensor/binary_valued.mlir | 69 +++----
mlir/test/Dialect/SparseTensor/codegen.mlir | 23 ++-
.../SparseTensor/sparse_matmul_codegen.mlir | 170 ++++++++----------
.../Dialect/SparseTensor/CPU/sparse_ds.mlir | 20 +--
.../SparseTensor/CPU/sparse_empty.mlir | 22 +--
.../SparseTensor/CPU/sparse_print.mlir | 102 +++++------
.../GPU/CUDA/sparse-gemm-lib.mlir | 6 +-
.../GPU/CUDA/sparse-sampled-matmul-lib.mlir | 12 +-
.../GPU/CUDA/sparse-sddmm-lib.mlir | 12 +-
10 files changed, 241 insertions(+), 240 deletions(-)
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
index 5679f277e14866..339f1d31adabcc 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
@@ -1050,10 +1050,14 @@ class SparseToPositionsConverter : public OpConversionPattern<ToPositionsOp> {
matchAndRewrite(ToPositionsOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
// Replace the requested position access with corresponding field.
- // The cast_op is inserted by type converter to intermix 1:N type
- // conversion.
+ // The view is restricted to the actual size to ensure clients
+ // of this operation truly obserview size, not capacity!
+ Location loc = op.getLoc();
+ Level lvl = op.getLevel();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
- rewriter.replaceOp(op, desc.getPosMemRef(op.getLevel()));
+ auto mem = desc.getPosMemRef(lvl);
+ auto size = desc.getPosMemSize(rewriter, loc, lvl);
+ rewriter.replaceOp(op, genSliceToSize(rewriter, loc, mem, size));
return success();
}
};
@@ -1068,12 +1072,17 @@ class SparseToCoordinatesConverter
matchAndRewrite(ToCoordinatesOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
// Replace the requested coordinates access with corresponding field.
- // The cast_op is inserted by type converter to intermix 1:N type
- // conversion.
+ // The view is restricted to the actual size to ensure clients
+ // of this operation truly obserview size, not capacity!
+ Location loc = op.getLoc();
+ Level lvl = op.getLevel();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
- rewriter.replaceOp(
- op, desc.getCrdMemRefOrView(rewriter, op.getLoc(), op.getLevel()));
-
+ auto mem = desc.getCrdMemRefOrView(rewriter, loc, lvl);
+ if (lvl < getSparseTensorType(op.getTensor()).getAoSCOOStart()) {
+ auto size = desc.getCrdMemSize(rewriter, loc, lvl);
+ mem = genSliceToSize(rewriter, loc, mem, size);
+ }
+ rewriter.replaceOp(op, mem);
return success();
}
};
@@ -1088,11 +1097,14 @@ class SparseToCoordinatesBufferConverter
matchAndRewrite(ToCoordinatesBufferOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
// Replace the requested coordinates access with corresponding field.
- // The cast_op is inserted by type converter to intermix 1:N type
- // conversion.
+ // The view is restricted to the actual size to ensure clients
+ // of this operation truly obserview size, not capacity!
+ Location loc = op.getLoc();
+ Level lvl = getSparseTensorType(op.getTensor()).getAoSCOOStart();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
- rewriter.replaceOp(op, desc.getAOSMemRef());
-
+ auto mem = desc.getAOSMemRef();
+ auto size = desc.getCrdMemSize(rewriter, loc, lvl);
+ rewriter.replaceOp(op, genSliceToSize(rewriter, loc, mem, size));
return success();
}
};
@@ -1106,10 +1118,13 @@ class SparseToValuesConverter : public OpConversionPattern<ToValuesOp> {
matchAndRewrite(ToValuesOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
// Replace the requested values access with corresponding field.
- // The cast_op is inserted by type converter to intermix 1:N type
- // conversion.
+ // The view is restricted to the actual size to ensure clients
+ // of this operation truly obserview size, not capacity!
+ Location loc = op.getLoc();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
- rewriter.replaceOp(op, desc.getValMemRef());
+ auto mem = desc.getValMemRef();
+ auto size = desc.getValMemSize(rewriter, loc);
+ rewriter.replaceOp(op, genSliceToSize(rewriter, loc, mem, size));
return success();
}
};
diff --git a/mlir/test/Dialect/SparseTensor/binary_valued.mlir b/mlir/test/Dialect/SparseTensor/binary_valued.mlir
index e2d410b126a775..dd9b60a6488b6f 100755
--- a/mlir/test/Dialect/SparseTensor/binary_valued.mlir
+++ b/mlir/test/Dialect/SparseTensor/binary_valued.mlir
@@ -26,12 +26,11 @@
//
// Make sure X += A * A => X += 1 in single loop.
//
-//
// CHECK-LABEL: func.func @sum_squares(
// CHECK-SAME: %[[VAL_0:.*0]]: memref<?xindex>,
// CHECK-SAME: %[[VAL_1:.*1]]: memref<?xindex>,
// CHECK-SAME: %[[VAL_2:.*2]]: memref<?xf32>,
-// CHECK-SAME: %[[VAL_3:.*3]]: !sparse_tensor.storage_specifier<#{{.*}}>) -> memref<f32> {
+// CHECK-SAME: %[[VAL_3:.*]]: !sparse_tensor.storage_specifier<#{{.*}}>) -> memref<f32> {
// CHECK-DAG: %[[VAL_4:.*]] = arith.constant 1.000000e+00 : f32
// CHECK-DAG: %[[VAL_5:.*]] = arith.constant 1 : index
// CHECK-DAG: %[[VAL_6:.*]] = arith.constant 0 : index
@@ -40,23 +39,25 @@
// CHECK-DAG: %[[VAL_9:.*]] = arith.constant 0.000000e+00 : f32
// CHECK: %[[VAL_10:.*]] = memref.alloc() {alignment = 64 : i64} : memref<f32>
// CHECK: linalg.fill ins(%[[VAL_9]] : f32) outs(%[[VAL_10]] : memref<f32>)
-// CHECK: %[[VAL_11:.*]] = memref.load %[[VAL_10]][] : memref<f32>
-// CHECK: %[[VAL_12:.*]] = scf.for %[[VAL_13:.*]] = %[[VAL_6]] to %[[VAL_8]] step %[[VAL_5]] iter_args(%[[VAL_14:.*]] = %[[VAL_11]]) -> (f32) {
-// CHECK: %[[VAL_15:.*]] = arith.muli %[[VAL_13]], %[[VAL_7]] : index
-// CHECK: %[[VAL_16:.*]] = scf.for %[[VAL_17:.*]] = %[[VAL_6]] to %[[VAL_7]] step %[[VAL_5]] iter_args(%[[VAL_18:.*]] = %[[VAL_14]]) -> (f32) {
-// CHECK: %[[VAL_19:.*]] = arith.addi %[[VAL_17]], %[[VAL_15]] : index
-// CHECK: %[[VAL_20:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_19]]] : memref<?xindex>
-// CHECK: %[[VAL_21:.*]] = arith.addi %[[VAL_19]], %[[VAL_5]] : index
-// CHECK: %[[VAL_22:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_21]]] : memref<?xindex>
-// CHECK: %[[VAL_23:.*]] = scf.for %[[VAL_24:.*]] = %[[VAL_20]] to %[[VAL_22]] step %[[VAL_5]] iter_args(%[[VAL_25:.*]] = %[[VAL_18]]) -> (f32) {
-// CHECK: %[[VAL_26:.*]] = arith.addf %[[VAL_25]], %[[VAL_4]] : f32
-// CHECK: scf.yield %[[VAL_26]] : f32
+// CHECK: %[[VAL_11:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]]
+// CHECK: %[[VAL_12:.*]] = memref.subview %[[VAL_0]][0] {{\[}}%[[VAL_11]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_13:.*]] = memref.load %[[VAL_10]][] : memref<f32>
+// CHECK: %[[VAL_14:.*]] = scf.for %[[VAL_15:.*]] = %[[VAL_6]] to %[[VAL_8]] step %[[VAL_5]] iter_args(%[[VAL_16:.*]] = %[[VAL_13]]) -> (f32) {
+// CHECK: %[[VAL_17:.*]] = arith.muli %[[VAL_15]], %[[VAL_7]] : index
+// CHECK: %[[VAL_18:.*]] = scf.for %[[VAL_19:.*]] = %[[VAL_6]] to %[[VAL_7]] step %[[VAL_5]] iter_args(%[[VAL_20:.*]] = %[[VAL_16]]) -> (f32) {
+// CHECK: %[[VAL_21:.*]] = arith.addi %[[VAL_19]], %[[VAL_17]] : index
+// CHECK: %[[VAL_22:.*]] = memref.load %[[VAL_12]]{{\[}}%[[VAL_21]]] : memref<?xindex>
+// CHECK: %[[VAL_23:.*]] = arith.addi %[[VAL_21]], %[[VAL_5]] : index
+// CHECK: %[[VAL_24:.*]] = memref.load %[[VAL_12]]{{\[}}%[[VAL_23]]] : memref<?xindex>
+// CHECK: %[[VAL_25:.*]] = scf.for %[[VAL_26:.*]] = %[[VAL_22]] to %[[VAL_24]] step %[[VAL_5]] iter_args(%[[VAL_27:.*]] = %[[VAL_20]]) -> (f32) {
+// CHECK: %[[VAL_28:.*]] = arith.addf %[[VAL_27]], %[[VAL_4]] : f32
+// CHECK: scf.yield %[[VAL_28]] : f32
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: scf.yield %[[VAL_23]] : f32
+// CHECK: scf.yield %[[VAL_25]] : f32
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: scf.yield %[[VAL_16]] : f32
+// CHECK: scf.yield %[[VAL_18]] : f32
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: memref.store %[[VAL_12]], %[[VAL_10]][] : memref<f32>
+// CHECK: memref.store %[[VAL_14]], %[[VAL_10]][] : memref<f32>
// CHECK: return %[[VAL_10]] : memref<f32>
// CHECK: }
//
@@ -99,25 +100,29 @@ func.func @sum_squares(%a: tensor<2x3x8xf32, #Sparse>) -> tensor<f32> {
// CHECK-DAG: %[[VAL_9:.*]] = arith.constant 0.000000e+00 : f32
// CHECK: %[[VAL_10:.*]] = memref.alloc() {alignment = 64 : i64} : memref<f32>
// CHECK: linalg.fill ins(%[[VAL_9]] : f32) outs(%[[VAL_10]] : memref<f32>)
-// CHECK: %[[VAL_11:.*]] = memref.load %[[VAL_10]][] : memref<f32>
-// CHECK: %[[VAL_12:.*]] = scf.for %[[VAL_13:.*]] = %[[VAL_6]] to %[[VAL_8]] step %[[VAL_5]] iter_args(%[[VAL_14:.*]] = %[[VAL_11]]) -> (f32) {
-// CHECK: %[[VAL_15:.*]] = arith.muli %[[VAL_13]], %[[VAL_7]] : index
-// CHECK: %[[VAL_16:.*]] = scf.for %[[VAL_17:.*]] = %[[VAL_6]] to %[[VAL_7]] step %[[VAL_5]] iter_args(%[[VAL_18:.*]] = %[[VAL_14]]) -> (f32) {
-// CHECK: %[[VAL_19:.*]] = arith.addi %[[VAL_17]], %[[VAL_15]] : index
-// CHECK: %[[VAL_20:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_19]]] : memref<?xindex>
-// CHECK: %[[VAL_21:.*]] = arith.addi %[[VAL_19]], %[[VAL_5]] : index
-// CHECK: %[[VAL_22:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_21]]] : memref<?xindex>
-// CHECK: %[[VAL_23:.*]] = scf.for %[[VAL_24:.*]] = %[[VAL_20]] to %[[VAL_22]] step %[[VAL_5]] iter_args(%[[VAL_25:.*]] = %[[VAL_18]]) -> (f32) {
-// CHECK: %[[VAL_26:.*]] = memref.load %[[VAL_1]]{{\[}}%[[VAL_24]]] : memref<?xindex>
-// CHECK: %[[VAL_27:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_13]], %[[VAL_17]], %[[VAL_26]]] : memref<2x3x8xf32>
-// CHECK: %[[VAL_28:.*]] = arith.addf %[[VAL_27]], %[[VAL_25]] : f32
-// CHECK: scf.yield %[[VAL_28]] : f32
+// CHECK: %[[VAL_11:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]]
+// CHECK: %[[VAL_12:.*]] = memref.subview %[[VAL_0]][0] {{\[}}%[[VAL_11]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_13:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]]
+// CHECK: %[[VAL_14:.*]] = memref.subview %[[VAL_1]][0] {{\[}}%[[VAL_13]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_15:.*]] = memref.load %[[VAL_10]][] : memref<f32>
+// CHECK: %[[VAL_16:.*]] = scf.for %[[VAL_17:.*]] = %[[VAL_6]] to %[[VAL_8]] step %[[VAL_5]] iter_args(%[[VAL_18:.*]] = %[[VAL_15]]) -> (f32) {
+// CHECK: %[[VAL_19:.*]] = arith.muli %[[VAL_17]], %[[VAL_7]] : index
+// CHECK: %[[VAL_20:.*]] = scf.for %[[VAL_21:.*]] = %[[VAL_6]] to %[[VAL_7]] step %[[VAL_5]] iter_args(%[[VAL_22:.*]] = %[[VAL_18]]) -> (f32) {
+// CHECK: %[[VAL_23:.*]] = arith.addi %[[VAL_21]], %[[VAL_19]] : index
+// CHECK: %[[VAL_24:.*]] = memref.load %[[VAL_12]]{{\[}}%[[VAL_23]]] : memref<?xindex>
+// CHECK: %[[VAL_25:.*]] = arith.addi %[[VAL_23]], %[[VAL_5]] : index
+// CHECK: %[[VAL_26:.*]] = memref.load %[[VAL_12]]{{\[}}%[[VAL_25]]] : memref<?xindex>
+// CHECK: %[[VAL_27:.*]] = scf.for %[[VAL_28:.*]] = %[[VAL_24]] to %[[VAL_26]] step %[[VAL_5]] iter_args(%[[VAL_29:.*]] = %[[VAL_22]]) -> (f32) {
+// CHECK: %[[VAL_30:.*]] = memref.load %[[VAL_14]]{{\[}}%[[VAL_28]]] : memref<?xindex>
+// CHECK: %[[VAL_31:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_17]], %[[VAL_21]], %[[VAL_30]]] : memref<2x3x8xf32>
+// CHECK: %[[VAL_32:.*]] = arith.addf %[[VAL_31]], %[[VAL_29]] : f32
+// CHECK: scf.yield %[[VAL_32]] : f32
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: scf.yield %[[VAL_23]] : f32
+// CHECK: scf.yield %[[VAL_27]] : f32
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: scf.yield %[[VAL_16]] : f32
+// CHECK: scf.yield %[[VAL_20]] : f32
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: memref.store %[[VAL_12]], %[[VAL_10]][] : memref<f32>
+// CHECK: memref.store %[[VAL_16]], %[[VAL_10]][] : memref<f32>
// CHECK: return %[[VAL_10]] : memref<f32>
// CHECK: }
//
diff --git a/mlir/test/Dialect/SparseTensor/codegen.mlir b/mlir/test/Dialect/SparseTensor/codegen.mlir
index 40bfa1e4e2a501..af78458f109329 100644
--- a/mlir/test/Dialect/SparseTensor/codegen.mlir
+++ b/mlir/test/Dialect/SparseTensor/codegen.mlir
@@ -266,7 +266,9 @@ func.func @sparse_dense_3d_dyn(%arg0: tensor<?x?x?xf64, #Dense3D>) -> index {
// CHECK-SAME: %[[A3:.*3]]: memref<?xi64>,
// CHECK-SAME: %[[A4:.*4]]: memref<?xf64>,
// CHECK-SAME: %[[A5:.*5]]: !sparse_tensor.storage_specifier
-// CHECK: return %[[A2]] : memref<?xi32>
+// CHECK: %[[S:.*]] = sparse_tensor.storage_specifier.get %[[A5]] pos_mem_sz at 1
+// CHECK: %[[V:.*]] = memref.subview %[[A2]][0] [%[[S]]] [1]
+// CHECK: return %[[V]] : memref<?xi32>
func.func @sparse_positions_dcsr(%arg0: tensor<?x?xf64, #DCSR>) -> memref<?xi32> {
%0 = sparse_tensor.positions %arg0 { level = 1 : index } : tensor<?x?xf64, #DCSR> to memref<?xi32>
return %0 : memref<?xi32>
@@ -279,7 +281,9 @@ func.func @sparse_positions_dcsr(%arg0: tensor<?x?xf64, #DCSR>) -> memref<?xi32>
// CHECK-SAME: %[[A3:.*3]]: memref<?xi64>,
// CHECK-SAME: %[[A4:.*4]]: memref<?xf64>,
// CHECK-SAME: %[[A5:.*5]]: !sparse_tensor.storage_specifier
-// CHECK: return %[[A3]] : memref<?xi64>
+// CHECK: %[[S:.*]] = sparse_tensor.storage_specifier.get %[[A5]] crd_mem_sz at 1
+// CHECK: %[[V:.*]] = memref.subview %[[A3]][0] [%[[S]]] [1]
+// CHECK: return %[[V]] : memref<?xi64>
func.func @sparse_indices_dcsr(%arg0: tensor<?x?xf64, #DCSR>) -> memref<?xi64> {
%0 = sparse_tensor.coordinates %arg0 { level = 1 : index } : tensor<?x?xf64, #DCSR> to memref<?xi64>
return %0 : memref<?xi64>
@@ -292,7 +296,9 @@ func.func @sparse_indices_dcsr(%arg0: tensor<?x?xf64, #DCSR>) -> memref<?xi64> {
// CHECK-SAME: %[[A3:.*3]]: memref<?xi64>,
// CHECK-SAME: %[[A4:.*4]]: memref<?xf64>,
// CHECK-SAME: %[[A5:.*5]]: !sparse_tensor.storage_specifier
-// CHECK: return %[[A4]] : memref<?xf64>
+// CHECK: %[[S:.*]] = sparse_tensor.storage_specifier.get %[[A5]] val_mem_sz
+// CHECK: %[[V:.*]] = memref.subview %[[A4]][0] [%[[S]]] [1]
+// CHECK: return %[[V]] : memref<?xf64>
func.func @sparse_values_dcsr(%arg0: tensor<?x?xf64, #DCSR>) -> memref<?xf64> {
%0 = sparse_tensor.values %arg0 : tensor<?x?xf64, #DCSR> to memref<?xf64>
return %0 : memref<?xf64>
@@ -305,13 +311,14 @@ func.func @sparse_values_dcsr(%arg0: tensor<?x?xf64, #DCSR>) -> memref<?xf64> {
// CHECK-SAME: %[[A3:.*3]]: memref<?xindex>,
// CHECK-SAME: %[[A4:.*4]]: memref<?xf64>,
// CHECK-SAME: %[[A5:.*5]]: !sparse_tensor.storage_specifier
-// CHECK: return %[[A4]] : memref<?xf64>
+// CHECK: %[[S:.*]] = sparse_tensor.storage_specifier.get %[[A5]] val_mem_sz
+// CHECK: %[[V:.*]] = memref.subview %[[A4]][0] [%[[S]]] [1]
+// CHECK: return %[[V]] : memref<?xf64>
func.func @sparse_values_coo(%arg0: tensor<?x?x?xf64, #ccoo>) -> memref<?xf64> {
%0 = sparse_tensor.values %arg0 : tensor<?x?x?xf64, #ccoo> to memref<?xf64>
return %0 : memref<?xf64>
}
-
// CHECK-LABEL: func.func @sparse_indices_coo(
// CHECK-SAME: %[[A0:.*0]]: memref<?xindex>,
// CHECK-SAME: %[[A1:.*1]]: memref<?xindex>,
@@ -320,7 +327,7 @@ func.func @sparse_values_coo(%arg0: tensor<?x?x?xf64, #ccoo>) -> memref<?xf64> {
// CHECK-SAME: %[[A4:.*4]]: memref<?xf64>,
// CHECK-SAME: %[[A5:.*5]]: !sparse_tensor.storage_specifier
// CHECK: %[[C2:.*]] = arith.constant 2 : index
-// CHECK: %[[S0:.*]] = sparse_tensor.storage_specifier.get %[[A5]] crd_mem_sz at 1
+// CHECK: %[[S0:.*]] = sparse_tensor.storage_specifier.get %[[A5]] crd_mem_sz at 1
// CHECK: %[[S2:.*]] = arith.divui %[[S0]], %[[C2]] : index
// CHECK: %[[R1:.*]] = memref.subview %[[A3]][0] {{\[}}%[[S2]]] [2] : memref<?xindex> to memref<?xindex, strided<[2]>>
// CHECK: %[[R2:.*]] = memref.cast %[[R1]] : memref<?xindex, strided<[2]>> to memref<?xindex, strided<[?], offset: ?>>
@@ -337,7 +344,9 @@ func.func @sparse_indices_coo(%arg0: tensor<?x?x?xf64, #ccoo>) -> memref<?xindex
// CHECK-SAME: %[[A3:.*3]]: memref<?xindex>,
// CHECK-SAME: %[[A4:.*4]]: memref<?xf64>,
// CHECK-SAME: %[[A5:.*5]]: !sparse_tensor.storage_specifier
-// CHECK: return %[[A3]] : memref<?xindex>
+// CHECK: %[[S:.*]] = sparse_tensor.storage_specifier.get %[[A5]] crd_mem_sz at 1
+// CHECK: %[[V:.*]] = memref.subview %[[A3]][0] [%[[S]]] [1]
+// CHECK: return %[[V]] : memref<?xindex>
func.func @sparse_indices_buffer_coo(%arg0: tensor<?x?x?xf64, #ccoo>) -> memref<?xindex> {
%0 = sparse_tensor.coordinates_buffer %arg0 : tensor<?x?x?xf64, #ccoo> to memref<?xindex>
return %0 : memref<?xindex>
diff --git a/mlir/test/Dialect/SparseTensor/sparse_matmul_codegen.mlir b/mlir/test/Dialect/SparseTensor/sparse_matmul_codegen.mlir
index 5145d6c1dcfc32..ad12b637d0c522 100644
--- a/mlir/test/Dialect/SparseTensor/sparse_matmul_codegen.mlir
+++ b/mlir/test/Dialect/SparseTensor/sparse_matmul_codegen.mlir
@@ -1,5 +1,3 @@
-// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
-
// RUN: mlir-opt %s --linalg-generalize-named-ops \
// RUN: --sparse-reinterpret-map --sparsification --sparse-tensor-codegen \
// RUN: --canonicalize --cse | FileCheck %s
@@ -11,45 +9,6 @@
//
// Computes C = A x B with all matrices sparse (SpMSpM) in CSR.
//
-// CHECK-LABEL: func.func private @_insert_dense_compressed_4_4_f64_0_0(
-// CHECK-SAME: %[[VAL_0:.*0]]: memref<?xindex>,
-// CHECK-SAME: %[[VAL_1:.*1]]: memref<?xindex>,
-// CHECK-SAME: %[[VAL_2:.*2]]: memref<?xf64>,
-// CHECK-SAME: %[[VAL_3:.*3]]: !sparse_tensor.storage_specifier
-// CHECK-SAME: %[[VAL_4:.*4]]: index,
-// CHECK-SAME: %[[VAL_5:.*5]]: index,
-// CHECK-SAME: %[[VAL_6:.*6]]: f64) -> (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_7:.*]] = arith.constant false
-// CHECK: %[[VAL_8:.*]] = arith.constant 1 : index
-// CHECK: %[[VAL_9:.*]] = arith.addi %[[VAL_4]], %[[VAL_8]] : index
-// CHECK: %[[VAL_10:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_4]]] : memref<?xindex>
-// CHECK: %[[VAL_11:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_9]]] : memref<?xindex>
-// CHECK: %[[VAL_13:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]] crd_mem_sz at 1 : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_14:.*]] = arith.subi %[[VAL_11]], %[[VAL_8]] : index
-// CHECK: %[[VAL_15:.*]] = arith.cmpi ult, %[[VAL_10]], %[[VAL_11]] : index
-// CHECK: %[[VAL_16:.*]] = scf.if %[[VAL_15]] -> (i1) {
-// CHECK: %[[VAL_17:.*]] = memref.load %[[VAL_1]]{{\[}}%[[VAL_14]]] : memref<?xindex>
-// CHECK: %[[VAL_18:.*]] = arith.cmpi eq, %[[VAL_17]], %[[VAL_5]] : index
-// CHECK: scf.yield %[[VAL_18]] : i1
-// CHECK: } else {
-// CHECK: memref.store %[[VAL_13]], %[[VAL_0]]{{\[}}%[[VAL_4]]] : memref<?xindex>
-// CHECK: scf.yield %[[VAL_7]] : i1
-// CHECK: }
-// CHECK: %[[VAL_19:.*]]:2 = scf.if %[[VAL_20:.*]] -> (memref<?xindex>, !sparse_tensor.storage_specifier
-// CHECK: scf.yield %[[VAL_1]], %[[VAL_3]] : memref<?xindex>, !sparse_tensor.storage_specifier
-// CHECK: } else {
-// CHECK: %[[VAL_21:.*]] = arith.addi %[[VAL_13]], %[[VAL_8]] : index
-// CHECK: memref.store %[[VAL_21]], %[[VAL_0]]{{\[}}%[[VAL_9]]] : memref<?xindex>
-// CHECK: %[[VAL_22:.*]], %[[VAL_24:.*]] = sparse_tensor.push_back %[[VAL_13]], %[[VAL_1]], %[[VAL_5]] : index, memref<?xindex>, index
-// CHECK: %[[VAL_25:.*]] = sparse_tensor.storage_specifier.set %[[VAL_3]] crd_mem_sz at 1 with %[[VAL_24]] : !sparse_tensor.storage_specifier
-// CHECK: scf.yield %[[VAL_22]], %[[VAL_25]] : memref<?xindex>, !sparse_tensor.storage_specifier
-// CHECK: }
-// CHECK: %[[VAL_28:.*]] = sparse_tensor.storage_specifier.get %[[VAL_27:.*]]#1 val_mem_sz : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_29:.*]], %[[VAL_30:.*]] = sparse_tensor.push_back %[[VAL_28]], %[[VAL_2]], %[[VAL_6]] : index, memref<?xf64>, f64
-// CHECK: %[[VAL_32:.*]] = sparse_tensor.storage_specifier.set %[[VAL_27]]#1 val_mem_sz with %[[VAL_30]] : !sparse_tensor.storage_specifier
-// CHECK: return %[[VAL_0]], %[[VAL_27]]#0, %[[VAL_29]], %[[VAL_32]] : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
-// CHECK: }
-
// CHECK-LABEL: func.func @matmul(
// CHECK-SAME: %[[VAL_0:.*0]]: memref<?xindex>,
// CHECK-SAME: %[[VAL_1:.*1]]: memref<?xindex>,
@@ -59,12 +18,12 @@
// CHECK-SAME: %[[VAL_5:.*5]]: memref<?xindex>,
// CHECK-SAME: %[[VAL_6:.*6]]: memref<?xf64>,
// CHECK-SAME: %[[VAL_7:.*7]]: !sparse_tensor.storage_specifier
-// CHECK-DAG: %[[VAL_8:.*]] = arith.constant 4 : index
-// CHECK-DAG: %[[VAL_9:.*]] = arith.constant 0.000000e+00 : f64
-// CHECK-DAG: %[[VAL_10:.*]] = arith.constant 0 : index
+// CHECK-DAG: %[[VAL_8:.*]] = arith.constant 0.000000e+00 : f64
+// CHECK-DAG: %[[VAL_9:.*]] = arith.constant true
+// CHECK-DAG: %[[VAL_10:.*]] = arith.constant false
// CHECK-DAG: %[[VAL_11:.*]] = arith.constant 1 : index
-// CHECK-DAG: %[[VAL_12:.*]] = arith.constant false
-// CHECK-DAG: %[[VAL_13:.*]] = arith.constant true
+// CHECK-DAG: %[[VAL_12:.*]] = arith.constant 0 : index
+// CHECK-DAG: %[[VAL_13:.*]] = arith.constant 4 : index
// CHECK: %[[VAL_14:.*]] = memref.alloc() : memref<16xindex>
// CHECK: %[[VAL_15:.*]] = memref.cast %[[VAL_14]] : memref<16xindex> to memref<?xindex>
// CHECK: %[[VAL_16:.*]] = memref.alloc() : memref<16xindex>
@@ -72,76 +31,89 @@
// CHECK: %[[VAL_18:.*]] = memref.alloc() : memref<16xf64>
// CHECK: %[[VAL_19:.*]] = memref.cast %[[VAL_18]] : memref<16xf64> to memref<?xf64>
// CHECK: %[[VAL_20:.*]] = sparse_tensor.storage_specifier.init : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_21:.*]] = sparse_tensor.storage_specifier.set %[[VAL_20]] lvl_sz at 0 with %[[VAL_8]] : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_22:.*]] = sparse_tensor.storage_specifier.set %[[VAL_21]] lvl_sz at 1 with %[[VAL_8]] : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_21:.*]] = sparse_tensor.storage_specifier.set %[[VAL_20]] lvl_sz at 0 with %[[VAL_13]] : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_22:.*]] = sparse_tensor.storage_specifier.set %[[VAL_21]] lvl_sz at 1 with %[[VAL_13]] : !sparse_tensor.storage_specifier
// CHECK: %[[VAL_23:.*]] = sparse_tensor.storage_specifier.get %[[VAL_22]] pos_mem_sz at 1 : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_24:.*]], %[[VAL_25:.*]] = sparse_tensor.push_back %[[VAL_23]], %[[VAL_15]], %[[VAL_10]] : index, memref<?xindex>, index
+// CHECK: %[[VAL_24:.*]], %[[VAL_25:.*]] = sparse_tensor.push_back %[[VAL_23]], %[[VAL_15]], %[[VAL_12]] : index, memref<?xindex>, index
// CHECK: %[[VAL_26:.*]] = sparse_tensor.storage_specifier.set %[[VAL_22]] pos_mem_sz at 1 with %[[VAL_25]] : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_27:.*]], %[[VAL_28:.*]] = sparse_tensor.push_back %[[VAL_25]], %[[VAL_24]], %[[VAL_10]], %[[VAL_8]] : index, memref<?xindex>, index, index
+// CHECK: %[[VAL_27:.*]], %[[VAL_28:.*]] = sparse_tensor.push_back %[[VAL_25]], %[[VAL_24]], %[[VAL_12]], %[[VAL_13]] : index, memref<?xindex>, index, index
// CHECK: %[[VAL_29:.*]] = sparse_tensor.storage_specifier.set %[[VAL_26]] pos_mem_sz at 1 with %[[VAL_28]] : !sparse_tensor.storage_specifier
// CHECK: %[[VAL_30:.*]] = memref.alloc() : memref<4xf64>
-// CHECK: %[[VAL_31:.*]] = m
+// CHECK: %[[VAL_31:.*]] = memref.alloc() : memref<4xi1>
// CHECK: %[[VAL_32:.*]] = memref.alloc() : memref<4xindex>
// CHECK: %[[VAL_33:.*]] = memref.cast %[[VAL_32]] : memref<4xindex> to memref<?xindex>
-// CHECK: linalg.fill ins(%[[VAL_9]] : f64) outs(%[[VAL_30]] : memref<4xf64>)
-// CHECK: linalg.fill ins(%[[VAL_12]] : i1) outs(%[[VAL_31]] : memref<4xi1>)
-// CHECK: %[[VAL_34:.*]]:4 = scf.for %[[VAL_35:.*]] = %[[VAL_10]] to %[[VAL_8]] step %[[VAL_11]] iter_args(%[[VAL_36:.*]] = %[[VAL_27]], %[[VAL_37:.*]] = %[[VAL_17]], %[[VAL_38:.*]] = %[[VAL_19]], %[[VAL_39:.*]] = %[[VAL_29]]) -> (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_40:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_35]]] : memref<?xindex>
-// CHECK: %[[VAL_41:.*]] = arith.addi %[[VAL_35]], %[[VAL_11]] : index
-// CHECK: %[[VAL_42:.*]] = memref.load %[[VAL_0]]{{\[}}%[[VAL_41]]] : memref<?xindex>
-// CHECK: %[[VAL_43:.*]] = scf.for %[[VAL_44:.*]] = %[[VAL_40]] to %[[VAL_42]] step %[[VAL_11]] iter_args(%[[VAL_45:.*]] = %[[VAL_10]]) -> (index) {
-// CHECK: %[[VAL_46:.*]] = memref.load %[[VAL_1]]{{\[}}%[[VAL_44]]] : memref<?xindex>
-// CHECK: %[[VAL_47:.*]] = memref.load %[[VAL_2]]{{\[}}%[[VAL_44]]] : memref<?xf64>
-// CHECK: %[[VAL_48:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_46]]] : memref<?xindex>
-// CHECK: %[[VAL_49:.*]] = arith.addi %[[VAL_46]], %[[VAL_11]] : index
-// CHECK: %[[VAL_50:.*]] = memref.load %[[VAL_4]]{{\[}}%[[VAL_49]]] : memref<?xindex>
-// CHECK: %[[VAL_51:.*]] = scf.for %[[VAL_52:.*]] = %[[VAL_48]] to %[[VAL_50]] step %[[VAL_11]] iter_args(%[[VAL_53:.*]] = %[[VAL_45]]) -> (index) {
-// CHECK: %[[VAL_54:.*]] = memref.load %[[VAL_5]]{{\[}}%[[VAL_52]]] : memref<?xindex>
-// CHECK: %[[VAL_55:.*]] = memref.load %[[VAL_30]]{{\[}}%[[VAL_54]]] : memref<4xf64>
-// CHECK: %[[VAL_56:.*]] = memref.load %[[VAL_6]]{{\[}}%[[VAL_52]]] : memref<?xf64>
-// CHECK: %[[VAL_57:.*]] = arith.mulf %[[VAL_47]], %[[VAL_56]] : f64
-// CHECK: %[[VAL_58:.*]] = arith.addf %[[VAL_55]], %[[VAL_57]] : f64
-// CHECK: %[[VAL_59:.*]] = memref.load %[[VAL_31]]{{\[}}%[[VAL_54]]] : memref<4xi1>
-// CHECK: %[[VAL_60:.*]] = arith.cmpi eq, %[[VAL_59]], %[[VAL_12]] : i1
-// CHECK: %[[VAL_61:.*]] = scf.if %[[VAL_60]] -> (index) {
-// CHECK: memref.store %[[VAL_13]], %[[VAL_31]]{{\[}}%[[VAL_54]]] : memref<4xi1>
-// CHECK: memref.store %[[VAL_54]], %[[VAL_32]]{{\[}}%[[VAL_53]]] : memref<4xindex>
-// CHECK: %[[VAL_62:.*]] = arith.addi %[[VAL_53]], %[[VAL_11]] : index
-// CHECK: scf.yield %[[VAL_62]] : index
+// CHECK: linalg.fill ins(%[[VAL_8]] : f64) outs(%[[VAL_30]] : memref<4xf64>)
+// CHECK: linalg.fill ins(%[[VAL_10]] : i1) outs(%[[VAL_31]] : memref<4xi1>)
+// CHECK: %[[VAL_34:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]] pos_mem_sz at 1 : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_35:.*]] = memref.subview %[[VAL_0]][0] {{\[}}%[[VAL_34]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_36:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]] crd_mem_sz at 1 : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_37:.*]] = memref.subview %[[VAL_1]][0] {{\[}}%[[VAL_36]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_38:.*]] = sparse_tensor.storage_specifier.get %[[VAL_3]] val_mem_sz : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_39:.*]] = memref.subview %[[VAL_2]][0] {{\[}}%[[VAL_38]]] [1] : memref<?xf64> to memref<?xf64>
+// CHECK: %[[VAL_40:.*]] = sparse_tensor.storage_specifier.get %[[VAL_7]] pos_mem_sz at 1 : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_41:.*]] = memref.subview %[[VAL_4]][0] {{\[}}%[[VAL_40]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_42:.*]] = sparse_tensor.storage_specifier.get %[[VAL_7]] crd_mem_sz at 1 : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_43:.*]] = memref.subview %[[VAL_5]][0] {{\[}}%[[VAL_42]]] [1] : memref<?xindex> to memref<?xindex>
+// CHECK: %[[VAL_44:.*]] = sparse_tensor.storage_specifier.get %[[VAL_7]] val_mem_sz : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_45:.*]] = memref.subview %[[VAL_6]][0] {{\[}}%[[VAL_44]]] [1] : memref<?xf64> to memref<?xf64>
+// CHECK: %[[VAL_46:.*]]:4 = scf.for %[[VAL_47:.*]] = %[[VAL_12]] to %[[VAL_13]] step %[[VAL_11]] iter_args(%[[VAL_48:.*]] = %[[VAL_27]], %[[VAL_49:.*]] = %[[VAL_17]], %[[VAL_50:.*]] = %[[VAL_19]], %[[VAL_51:.*]] = %[[VAL_29]]) -> (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_52:.*]] = memref.load %[[VAL_35]]{{\[}}%[[VAL_47]]] : memref<?xindex>
+// CHECK: %[[VAL_53:.*]] = arith.addi %[[VAL_47]], %[[VAL_11]] : index
+// CHECK: %[[VAL_54:.*]] = memref.load %[[VAL_35]]{{\[}}%[[VAL_53]]] : memref<?xindex>
+// CHECK: %[[VAL_55:.*]] = scf.for %[[VAL_56:.*]] = %[[VAL_52]] to %[[VAL_54]] step %[[VAL_11]] iter_args(%[[VAL_57:.*]] = %[[VAL_12]]) -> (index) {
+// CHECK: %[[VAL_58:.*]] = memref.load %[[VAL_37]]{{\[}}%[[VAL_56]]] : memref<?xindex>
+// CHECK: %[[VAL_59:.*]] = memref.load %[[VAL_39]]{{\[}}%[[VAL_56]]] : memref<?xf64>
+// CHECK: %[[VAL_60:.*]] = memref.load %[[VAL_41]]{{\[}}%[[VAL_58]]] : memref<?xindex>
+// CHECK: %[[VAL_61:.*]] = arith.addi %[[VAL_58]], %[[VAL_11]] : index
+// CHECK: %[[VAL_62:.*]] = memref.load %[[VAL_41]]{{\[}}%[[VAL_61]]] : memref<?xindex>
+// CHECK: %[[VAL_63:.*]] = scf.for %[[VAL_64:.*]] = %[[VAL_60]] to %[[VAL_62]] step %[[VAL_11]] iter_args(%[[VAL_65:.*]] = %[[VAL_57]]) -> (index) {
+// CHECK: %[[VAL_66:.*]] = memref.load %[[VAL_43]]{{\[}}%[[VAL_64]]] : memref<?xindex>
+// CHECK: %[[VAL_67:.*]] = memref.load %[[VAL_30]]{{\[}}%[[VAL_66]]] : memref<4xf64>
+// CHECK: %[[VAL_68:.*]] = memref.load %[[VAL_45]]{{\[}}%[[VAL_64]]] : memref<?xf64>
+// CHECK: %[[VAL_69:.*]] = arith.mulf %[[VAL_59]], %[[VAL_68]] : f64
+// CHECK: %[[VAL_70:.*]] = arith.addf %[[VAL_67]], %[[VAL_69]] : f64
+// CHECK: %[[VAL_71:.*]] = memref.load %[[VAL_31]]{{\[}}%[[VAL_66]]] : memref<4xi1>
+// CHECK: %[[VAL_72:.*]] = arith.cmpi eq, %[[VAL_71]], %[[VAL_10]] : i1
+// CHECK: %[[VAL_73:.*]] = scf.if %[[VAL_72]] -> (index) {
+// CHECK: memref.store %[[VAL_9]], %[[VAL_31]]{{\[}}%[[VAL_66]]] : memref<4xi1>
+// CHECK: memref.store %[[VAL_66]], %[[VAL_32]]{{\[}}%[[VAL_65]]] : memref<4xindex>
+// CHECK: %[[VAL_74:.*]] = arith.addi %[[VAL_65]], %[[VAL_11]] : index
+// CHECK: scf.yield %[[VAL_74]] : index
// CHECK: } else {
-// CHECK: scf.yield %[[VAL_53]] : index
+// CHECK: scf.yield %[[VAL_65]] : index
// CHECK: }
-// CHECK: memref.store %[[VAL_58]], %[[VAL_30]]{{\[}}%[[VAL_54]]] : memref<4xf64>
-// CHECK: scf.yield %[[VAL_63:.*]] : index
+// CHECK: memref.store %[[VAL_70]], %[[VAL_30]]{{\[}}%[[VAL_66]]] : memref<4xf64>
+// CHECK: scf.yield %[[VAL_73]] : index
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: scf.yield %[[VAL_64:.*]] : index
+// CHECK: scf.yield %[[VAL_63]] : index
// CHECK: } {"Emitted from" = "linalg.generic"}
-// CHECK: sparse_tensor.sort hybrid_quick_sort %[[VAL_65:.*]], %[[VAL_33]]
-// CHECK: %[[VAL_66:.*]]:4 = scf.for %[[VAL_67:.*]] = %[[VAL_10]] to %[[VAL_65]] step %[[VAL_11]] iter_args(%[[VAL_68:.*]] = %[[VAL_36]], %[[VAL_69:.*]] = %[[VAL_37]], %[[VAL_70:.*]] = %[[VAL_38]], %[[VAL_71:.*]] = %[[VAL_39]]) -> (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_72:.*]] = memref.load %[[VAL_32]]{{\[}}%[[VAL_67]]] : memref<4xindex>
-// CHECK: %[[VAL_73:.*]] = memref.load %[[VAL_30]]{{\[}}%[[VAL_72]]] : memref<4xf64>
-// CHECK: %[[VAL_74:.*]]:4 = func.call @_insert_dense_compressed_4_4_f64_0_0(%[[VAL_68]], %[[VAL_69]], %[[VAL_70]], %[[VAL_71]], %[[VAL_35]], %[[VAL_72]], %[[VAL_73]]) : (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifie
-// CHECK: memref.store %[[VAL_9]], %[[VAL_30]]{{\[}}%[[VAL_72]]] : memref<4xf64>
-// CHECK: memref.store %[[VAL_12]], %[[VAL_31]]{{\[}}%[[VAL_72]]] : memref<4xi1>
-// CHECK: scf.yield %[[VAL_74]]#0, %[[VAL_74]]#1, %[[VAL_74]]#2, %[[VAL_74]]#3 : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: sparse_tensor.sort hybrid_quick_sort %[[VAL_55]], %[[VAL_33]]
+// CHECK: %[[VAL_75:.*]]:4 = scf.for %[[VAL_76:.*]] = %[[VAL_12]] to %[[VAL_55]] step %[[VAL_11]] iter_args(%[[VAL_77:.*]] = %[[VAL_48]], %[[VAL_78:.*]] = %[[VAL_49]], %[[VAL_79:.*]] = %[[VAL_50]], %[[VAL_80:.*]] = %[[VAL_51]]) -> (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_81:.*]] = memref.load %[[VAL_32]]{{\[}}%[[VAL_76]]] : memref<4xindex>
+// CHECK: %[[VAL_82:.*]] = memref.load %[[VAL_30]]{{\[}}%[[VAL_81]]] : memref<4xf64>
+// CHECK: %[[VAL_83:.*]]:4 = func.call @_insert_dense_compressed_4_4_f64_0_0(%[[VAL_77]], %[[VAL_78]], %[[VAL_79]], %[[VAL_80]], %[[VAL_47]], %[[VAL_81]], %[[VAL_82]]) : (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: memref.store %[[VAL_8]], %[[VAL_30]]{{\[}}%[[VAL_81]]] : memref<4xf64>
+// CHECK: memref.store %[[VAL_10]], %[[VAL_31]]{{\[}}%[[VAL_81]]] : memref<4xi1>
+// CHECK: scf.yield %[[VAL_83]]#0, %[[VAL_83]]#1, %[[VAL_83]]#2, %[[VAL_83]]#3 : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
// CHECK: }
-// CHECK: scf.yield %[[VAL_75:.*]]#0, %[[VAL_75]]#1, %[[VAL_75]]#2, %[[VAL_75]]#3 : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: scf.yield %[[VAL_84:.*]]#0, %[[VAL_84]]#1, %[[VAL_84]]#2, %[[VAL_84]]#3 : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
// CHECK: } {"Emitted from" = "linalg.generic"}
// CHECK: memref.dealloc %[[VAL_30]] : memref<4xf64>
// CHECK: memref.dealloc %[[VAL_31]] : memref<4xi1>
// CHECK: memref.dealloc %[[VAL_32]] : memref<4xindex>
-// CHECK: %[[VAL_76:.*]] = sparse_tensor.storage_specifier.get %[[VAL_77:.*]]#3 pos_mem_sz at 1 : !sparse_tensor.storage_specifier
-// CHECK: %[[VAL_78:.*]] = memref.load %[[VAL_77]]#0{{\[}}%[[VAL_10]]] : memref<?xindex>
-// CHECK: %[[VAL_79:.*]] = scf.for %[[VAL_80:.*]] = %[[VAL_11]] to %[[VAL_76]] step %[[VAL_11]] iter_args(%[[VAL_81:.*]] = %[[VAL_78]]) -> (index) {
-// CHECK: %[[VAL_82:.*]] = memref.load %[[VAL_77]]#0{{\[}}%[[VAL_80]]] : memref<?xindex>
-// CHECK: %[[VAL_83:.*]] = arith.cmpi eq, %[[VAL_82]], %[[VAL_10]] : index
-// CHECK: %[[VAL_84:.*]] = arith.select %[[VAL_83]], %[[VAL_81]], %[[VAL_82]] : index
-// CHECK: scf.if %[[VAL_83]] {
-// CHECK: memref.store %[[VAL_81]], %[[VAL_77]]#0{{\[}}%[[VAL_80]]] : memref<?xindex>
+// CHECK: %[[VAL_85:.*]] = sparse_tensor.storage_specifier.get %[[VAL_86:.*]]#3 pos_mem_sz at 1 : !sparse_tensor.storage_specifier
+// CHECK: %[[VAL_87:.*]] = memref.load %[[VAL_86]]#0{{\[}}%[[VAL_12]]] : memref<?xindex>
+// CHECK: %[[VAL_88:.*]] = scf.for %[[VAL_89:.*]] = %[[VAL_11]] to %[[VAL_85]] step %[[VAL_11]] iter_args(%[[VAL_90:.*]] = %[[VAL_87]]) -> (index) {
+// CHECK: %[[VAL_91:.*]] = memref.load %[[VAL_86]]#0{{\[}}%[[VAL_89]]] : memref<?xindex>
+// CHECK: %[[VAL_92:.*]] = arith.cmpi eq, %[[VAL_91]], %[[VAL_12]] : index
+// CHECK: %[[VAL_93:.*]] = arith.select %[[VAL_92]], %[[VAL_90]], %[[VAL_91]] : index
+// CHECK: scf.if %[[VAL_92]] {
+// CHECK: memref.store %[[VAL_90]], %[[VAL_86]]#0{{\[}}%[[VAL_89]]] : memref<?xindex>
// CHECK: }
-// CHECK: scf.yield %[[VAL_84]] : index
+// CHECK: scf.yield %[[VAL_93]] : index
// CHECK: }
-// CHECK: return %[[VAL_77]]#0, %[[VAL_77]]#1, %[[VAL_77]]#2, %[[VAL_77]]#3 : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: return %[[VAL_86]]#0, %[[VAL_86]]#1, %[[VAL_86]]#2, %[[VAL_86]]#3 : memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
+// CHECK: }
func.func @matmul(%A: tensor<4x8xf64, #CSR>,
%B: tensor<8x4xf64, #CSR>) -> tensor<4x4xf64, #CSR> {
%C = tensor.empty() : tensor<4x4xf64, #CSR>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
index 37d8a42a299020..e03dbb2ea8f5cc 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
@@ -79,9 +79,9 @@ module {
// CHECK-NEXT: nse = 12
// CHECK-NEXT: dim = ( 3, 8 )
// CHECK-NEXT: lvl = ( 3, 8 )
- // CHECK-NEXT: pos[1] : ( 0, 4, 8, 12,
- // CHECK-NEXT: crd[1] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
+ // CHECK-NEXT: pos[1] : ( 0, 4, 8, 12, )
+ // CHECK-NEXT: crd[1] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, )
// CHECK-NEXT: ----
//
sparse_tensor.print %A1 : tensor<?x?xf64, #CSR>
@@ -93,9 +93,9 @@ module {
// CHECK-NEXT: nse = 12
// CHECK-NEXT: dim = ( 3, 8 )
// CHECK-NEXT: lvl = ( 3, 8 )
- // CHECK-NEXT: pos[1] : ( 0, 4, 4, 8, 8, 12,
- // CHECK-NEXT: crd[1] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
+ // CHECK-NEXT: pos[1] : ( 0, 4, 4, 8, 8, 12, )
+ // CHECK-NEXT: crd[1] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, )
// CHECK-NEXT: ----
//
sparse_tensor.print %A2 : tensor<?x?xf64, #CSR_hi>
@@ -107,8 +107,8 @@ module {
// CHECK-NEXT: nse = 12
// CHECK-NEXT: dim = ( 3, 8 )
// CHECK-NEXT: lvl = ( 3, 2, 4 )
- // CHECK-NEXT: crd[2] : ( 2, 3, 1, 3, 1, 2, 0, 3, 0, 2, 0, 1,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
+ // CHECK-NEXT: crd[2] : ( 2, 3, 1, 3, 1, 2, 0, 3, 0, 2, 0, 1, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, )
// CHECK-NEXT: ----
// CHECK-NEXT: ---- Sparse Tensor ----
//
@@ -120,8 +120,8 @@ module {
// CHECK-NEXT: nse = 12
// CHECK-NEXT: dim = ( 3, 8 )
// CHECK-NEXT: lvl = ( 3, 1, 8 )
- // CHECK-NEXT: crd[2] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
+ // CHECK-NEXT: crd[2] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, )
// CHECK-NEXT: ----
//
sparse_tensor.print %A4 : tensor<?x?xf64, #NV_58>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
index bcd71f7bd674bd..7fc37eade720db 100755
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
@@ -98,9 +98,9 @@ module {
// CHECK-NEXT: nse = 0
// CHECK-NEXT: dim = ( 10 )
// CHECK-NEXT: lvl = ( 10 )
- // CHECK-NEXT: pos[0] : ( 0, 0,
- // CHECK-NEXT: crd[0] : (
- // CHECK-NEXT: values : (
+ // CHECK-NEXT: pos[0] : ( 0, 0, )
+ // CHECK-NEXT: crd[0] : ( )
+ // CHECK-NEXT: values : ( )
// CHECK-NEXT: ----
//
// CHECK-NEXT: ---- Sparse Tensor ----
@@ -108,26 +108,26 @@ module {
// CHECK-NEXT: dim = ( 10 )
// CHECK-NEXT: lvl = ( 10 )
// CHECK-NEXT: pos[0] : ( 0, 0,
- // CHECK-NEXT: crd[0] : (
- // CHECK-NEXT: values : (
+ // CHECK-NEXT: crd[0] : ( )
+ // CHECK-NEXT: values : ( )
// CHECK-NEXT: ----
//
// CHECK-NEXT: ---- Sparse Tensor ----
// CHECK-NEXT: nse = 0
// CHECK-NEXT: dim = ( 10 )
// CHECK-NEXT: lvl = ( 10 )
- // CHECK-NEXT: pos[0] : ( 0, 0,
- // CHECK-NEXT: crd[0] : (
- // CHECK-NEXT: values : (
+ // CHECK-NEXT: pos[0] : ( 0, 0, )
+ // CHECK-NEXT: crd[0] : ( )
+ // CHECK-NEXT: values : ( )
// CHECK-NEXT: ----
//
// CHECK-NEXT: ---- Sparse Tensor ----
// CHECK-NEXT: nse = 10
// CHECK-NEXT: dim = ( 10 )
// CHECK-NEXT: lvl = ( 10 )
- // CHECK-NEXT: pos[0] : ( 0, 10,
- // CHECK-NEXT: crd[0] : ( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
- // CHECK-NEXT: values : ( 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ // CHECK-NEXT: pos[0] : ( 0, 10, )
+ // CHECK-NEXT: crd[0] : ( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, )
+ // CHECK-NEXT: values : ( 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, )
// CHECK-NEXT: ----
//
sparse_tensor.print %0 : tensor<10xf32, #SV>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
index 7758ca77dce9ea..b664b7f99944e7 100755
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
@@ -147,7 +147,7 @@ module {
// CHECK-NEXT: nse = 32
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 4, 8 )
- // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 5, 0, 0,
+ // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 5, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %XO : tensor<4x8xi32, #AllDense>
@@ -155,7 +155,7 @@ module {
// CHECK-NEXT: nse = 32
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 8, 4 )
- // CHECK-NEXT: values : ( 1, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0,
+ // CHECK-NEXT: values : ( 1, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %XT : tensor<4x8xi32, #AllDenseT>
@@ -176,9 +176,9 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 4, 8 )
- // CHECK-NEXT: pos[1] : ( 0, 2, 2, 2, 5,
- // CHECK-NEXT: crd[1] : ( 0, 2, 2, 3, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5,
+ // CHECK-NEXT: pos[1] : ( 0, 2, 2, 2, 5, )
+ // CHECK-NEXT: crd[1] : ( 0, 2, 2, 3, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, )
// CHECK-NEXT: ----
sparse_tensor.print %a : tensor<4x8xi32, #CSR>
@@ -186,11 +186,11 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 4, 8 )
- // CHECK-NEXT: pos[0] : ( 0, 2,
- // CHECK-NEXT: crd[0] : ( 0, 3,
- // CHECK-NEXT: pos[1] : ( 0, 2, 5,
- // CHECK-NEXT: crd[1] : ( 0, 2, 2, 3, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5,
+ // CHECK-NEXT: pos[0] : ( 0, 2, )
+ // CHECK-NEXT: crd[0] : ( 0, 3, )
+ // CHECK-NEXT: pos[1] : ( 0, 2, 5, )
+ // CHECK-NEXT: crd[1] : ( 0, 2, 2, 3, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, )
// CHECK-NEXT: ----
sparse_tensor.print %b : tensor<4x8xi32, #DCSR>
@@ -198,9 +198,9 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 8, 4 )
- // CHECK-NEXT: pos[1] : ( 0, 1, 1, 3, 4, 4, 5, 5, 5,
- // CHECK-NEXT: crd[1] : ( 0, 0, 3, 3, 3,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5,
+ // CHECK-NEXT: pos[1] : ( 0, 1, 1, 3, 4, 4, 5, 5, 5, )
+ // CHECK-NEXT: crd[1] : ( 0, 0, 3, 3, 3, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, )
// CHECK-NEXT: ----
sparse_tensor.print %c : tensor<4x8xi32, #CSC>
@@ -208,11 +208,11 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 8, 4 )
- // CHECK-NEXT: pos[0] : ( 0, 4,
- // CHECK-NEXT: crd[0] : ( 0, 2, 3, 5,
- // CHECK-NEXT: pos[1] : ( 0, 1, 3, 4, 5,
- // CHECK-NEXT: crd[1] : ( 0, 0, 3, 3, 3,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5,
+ // CHECK-NEXT: pos[0] : ( 0, 4, )
+ // CHECK-NEXT: crd[0] : ( 0, 2, 3, 5, )
+ // CHECK-NEXT: pos[1] : ( 0, 1, 3, 4, 5, )
+ // CHECK-NEXT: crd[1] : ( 0, 0, 3, 3, 3, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, )
// CHECK-NEXT: ----
sparse_tensor.print %d : tensor<4x8xi32, #DCSC>
@@ -220,11 +220,11 @@ module {
// CHECK-NEXT: nse = 24
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 2, 2, 2, 4 )
- // CHECK-NEXT: pos[0] : ( 0, 2,
- // CHECK-NEXT: crd[0] : ( 0, 1,
- // CHECK-NEXT: pos[1] : ( 0, 1, 3,
- // CHECK-NEXT: crd[1] : ( 0, 0, 1,
- // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0,
+ // CHECK-NEXT: pos[0] : ( 0, 2, )
+ // CHECK-NEXT: crd[0] : ( 0, 1, )
+ // CHECK-NEXT: pos[1] : ( 0, 1, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 0, 1, )
+ // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %e : tensor<4x8xi32, #BSR>
@@ -232,11 +232,11 @@ module {
// CHECK-NEXT: nse = 24
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 2, 2, 4, 2 )
- // CHECK-NEXT: pos[0] : ( 0, 2,
- // CHECK-NEXT: crd[0] : ( 0, 1,
- // CHECK-NEXT: pos[1] : ( 0, 1, 3,
- // CHECK-NEXT: crd[1] : ( 0, 0, 1,
- // CHECK-NEXT: values : ( 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 4, 0, 0, 0, 5, 0, 0, 0, 0,
+ // CHECK-NEXT: pos[0] : ( 0, 2, )
+ // CHECK-NEXT: crd[0] : ( 0, 1, )
+ // CHECK-NEXT: pos[1] : ( 0, 1, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 0, 1, )
+ // CHECK-NEXT: values : ( 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 4, 0, 0, 0, 5, 0, 0, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %f : tensor<4x8xi32, #BSRC>
@@ -244,11 +244,11 @@ module {
// CHECK-NEXT: nse = 24
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 2, 2, 2, 4 )
- // CHECK-NEXT: pos[0] : ( 0, 2,
- // CHECK-NEXT: crd[0] : ( 0, 1,
- // CHECK-NEXT: pos[1] : ( 0, 2, 3,
- // CHECK-NEXT: crd[1] : ( 0, 1, 1,
- // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0,
+ // CHECK-NEXT: pos[0] : ( 0, 2, )
+ // CHECK-NEXT: crd[0] : ( 0, 1, )
+ // CHECK-NEXT: pos[1] : ( 0, 2, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 1, 1, )
+ // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %g : tensor<4x8xi32, #BSC>
@@ -256,11 +256,11 @@ module {
// CHECK-NEXT: nse = 24
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 2, 2, 4, 2 )
- // CHECK-NEXT: pos[0] : ( 0, 2,
- // CHECK-NEXT: crd[0] : ( 0, 1,
- // CHECK-NEXT: pos[1] : ( 0, 2, 3,
- // CHECK-NEXT: crd[1] : ( 0, 1, 1,
- // CHECK-NEXT: values : ( 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 4, 0, 0, 0, 5, 0, 0, 0, 0,
+ // CHECK-NEXT: pos[0] : ( 0, 2, )
+ // CHECK-NEXT: crd[0] : ( 0, 1, )
+ // CHECK-NEXT: pos[1] : ( 0, 2, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 1, 1, )
+ // CHECK-NEXT: values : ( 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 4, 0, 0, 0, 5, 0, 0, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %h : tensor<4x8xi32, #BSCC>
@@ -268,9 +268,9 @@ module {
// CHECK-NEXT: nse = 24
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 2, 2, 2, 4 )
- // CHECK-NEXT: pos[1] : ( 0, 1, 3,
- // CHECK-NEXT: crd[1] : ( 0, 0, 1,
- // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0,
+ // CHECK-NEXT: pos[1] : ( 0, 1, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 0, 1, )
+ // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %i : tensor<4x8xi32, #BSR0>
@@ -278,9 +278,9 @@ module {
// CHECK-NEXT: nse = 24
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 2, 2, 2, 4 )
- // CHECK-NEXT: pos[1] : ( 0, 2, 3,
- // CHECK-NEXT: crd[1] : ( 0, 1, 1,
- // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0,
+ // CHECK-NEXT: pos[1] : ( 0, 2, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 1, 1, )
+ // CHECK-NEXT: values : ( 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 0, 5, 0, 0, )
// CHECK-NEXT: ----
sparse_tensor.print %j : tensor<4x8xi32, #BSC0>
@@ -288,9 +288,9 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 4, 8 )
- // CHECK-NEXT: pos[0] : ( 0, 5,
- // CHECK-NEXT: crd[0] : ( 0, 0, 0, 2, 3, 2, 3, 3, 3, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5,
+ // CHECK-NEXT: pos[0] : ( 0, 5, )
+ // CHECK-NEXT: crd[0] : ( 0, 0, 0, 2, 3, 2, 3, 3, 3, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, )
// CHECK-NEXT: ----
sparse_tensor.print %AoS : tensor<4x8xi32, #COOAoS>
@@ -298,10 +298,10 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 4, 8 )
// CHECK-NEXT: lvl = ( 4, 8 )
- // CHECK-NEXT: pos[0] : ( 0, 5,
- // CHECK-NEXT: crd[0] : ( 0, 0, 3, 3, 3,
- // CHECK-NEXT: crd[1] : ( 0, 2, 2, 3, 5,
- // CHECK-NEXT: values : ( 1, 2, 3, 4, 5,
+ // CHECK-NEXT: pos[0] : ( 0, 5, )
+ // CHECK-NEXT: crd[0] : ( 0, 0, 3, 3, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 2, 2, 3, 5, )
+ // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, )
// CHECK-NEXT: ----
sparse_tensor.print %SoA : tensor<4x8xi32, #COOSoA>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
index da78452d94fd6b..9413119509c677 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
@@ -68,9 +68,9 @@ module {
// CHECK-NEXT: nse = 20
// CHECK-NEXT: dim = ( 8, 8 )
// CHECK-NEXT: lvl = ( 8, 8 )
- // CHECK-NEXT: pos[1] : ( 0, 5, 5, 6, 7, 8, 12, 16, 20,
- // CHECK-NEXT: crd[1] : ( 0, 1, 2, 6, 7, 2, 3, 4, 1, 2, 6, 7, 1, 2, 6, 7, 1, 2, 6, 7,
- // CHECK-NEXT: values : ( 1, 39, 52, 45, 51, 16, 25, 36, 117, 158, 135, 144, 156, 318, 301, 324, 208, 430, 405, 436,
+ // CHECK-NEXT: pos[1] : ( 0, 5, 5, 6, 7, 8, 12, 16, 20, )
+ // CHECK-NEXT: crd[1] : ( 0, 1, 2, 6, 7, 2, 3, 4, 1, 2, 6, 7, 1, 2, 6, 7, 1, 2, 6, 7, )
+ // CHECK-NEXT: values : ( 1, 39, 52, 45, 51, 16, 25, 36, 117, 158, 135, 144, 156, 318, 301, 324, 208, 430, 405, 436, )
// CHECK-NEXT: ----
sparse_tensor.print %Ccsr : tensor<8x8xf32, #CSR>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
index 3d17b719732ff2..3b3d074f7e2a86 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
@@ -117,9 +117,9 @@ module {
// CHECK-NEXT: nse = 9
// CHECK-NEXT: dim = ( 5, 5 )
// CHECK-NEXT: lvl = ( 5, 5 )
- // CHECK-NEXT: pos[1] : ( 0, 2, 4, 5, 7, 9,
- // CHECK-NEXT: crd[1] : ( 0, 3, 1, 4, 2, 0, 3, 1, 4,
- // CHECK-NEXT: values : ( 11, 41.4, 42, 102.5, 93, 44.1, 164, 105.2, 255,
+ // CHECK-NEXT: pos[1] : ( 0, 2, 4, 5, 7, 9, )
+ // CHECK-NEXT: crd[1] : ( 0, 3, 1, 4, 2, 0, 3, 1, 4, )
+ // CHECK-NEXT: values : ( 11, 41.4, 42, 102.5, 93, 44.1, 164, 105.2, 255, )
// CHECK-NEXT: ----
sparse_tensor.print %0 : tensor<?x?xf32, #CSR>
@@ -145,9 +145,9 @@ module {
// CHECK-NEXT: nse = 5
// CHECK-NEXT: dim = ( 8, 8 )
// CHECK-NEXT: lvl = ( 8, 8 )
- // CHECK-NEXT: pos[1] : ( 0, 2, 3, 3, 4, 4, 4, 4, 5,
- // CHECK-NEXT: crd[1] : ( 0, 1, 0, 4, 7,
- // CHECK-NEXT: values : ( 17, 18, 19, 20, 21,
+ // CHECK-NEXT: pos[1] : ( 0, 2, 3, 3, 4, 4, 4, 4, 5, )
+ // CHECK-NEXT: crd[1] : ( 0, 1, 0, 4, 7, )
+ // CHECK-NEXT: values : ( 17, 18, 19, 20, 21, )
// CHECK-NEXT: ----
//
sparse_tensor.print %1 : tensor<?x?xf32, #CSR>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
index 68bb32891f3439..18f59f59a9f0b1 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
@@ -170,18 +170,18 @@ module {
// CHECK-NEXT: nse = 8
// CHECK-NEXT: dim = ( 4, 6 )
// CHECK-NEXT: lvl = ( 4, 6 )
- // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7, 8,
- // CHECK-NEXT: crd[1] : ( 0, 1, 4, 1, 5, 2, 3, 2,
- // CHECK-NEXT: values : ( 5, 10, 24, 19, 53, 42, 55, 56,
+ // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7, 8, )
+ // CHECK-NEXT: crd[1] : ( 0, 1, 4, 1, 5, 2, 3, 2, )
+ // CHECK-NEXT: values : ( 5, 10, 24, 19, 53, 42, 55, 56, )
// CHECK-NEXT: ----
//
// CHECK: ---- Sparse Tensor ----
// CHECK-NEXT: nse = 12
// CHECK-NEXT: dim = ( 4, 6 )
// CHECK-NEXT: lvl = ( 2, 3, 2, 2 )
- // CHECK-NEXT: pos[1] : ( 0, 2, 3,
- // CHECK-NEXT: crd[1] : ( 0, 2, 1,
- // CHECK-NEXT: values : ( 5, 10, 8, 19, 24, 24, 40, 53, 42, 55, 56, 64,
+ // CHECK-NEXT: pos[1] : ( 0, 2, 3, )
+ // CHECK-NEXT: crd[1] : ( 0, 2, 1, )
+ // CHECK-NEXT: values : ( 5, 10, 8, 19, 24, 24, 40, 53, 42, 55, 56, 64, )
// CHECK-NEXT: ----
//
sparse_tensor.print %0 : tensor<?x?xf32, #CSR>
>From 3ecc97b8e0438053ac94b0c8067272a8f77d4229 Mon Sep 17 00:00:00 2001
From: Aart Bik <ajcbik at google.com>
Date: Mon, 6 May 2024 18:47:22 -0700
Subject: [PATCH 2/3] typo
---
.../SparseTensor/Transforms/SparseTensorCodegen.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
index 339f1d31adabcc..d9b203a8864885 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
@@ -1051,7 +1051,7 @@ class SparseToPositionsConverter : public OpConversionPattern<ToPositionsOp> {
ConversionPatternRewriter &rewriter) const override {
// Replace the requested position access with corresponding field.
// The view is restricted to the actual size to ensure clients
- // of this operation truly obserview size, not capacity!
+ // of this operation truly observe size, not capacity!
Location loc = op.getLoc();
Level lvl = op.getLevel();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
@@ -1073,7 +1073,7 @@ class SparseToCoordinatesConverter
ConversionPatternRewriter &rewriter) const override {
// Replace the requested coordinates access with corresponding field.
// The view is restricted to the actual size to ensure clients
- // of this operation truly obserview size, not capacity!
+ // of this operation truly observe size, not capacity!
Location loc = op.getLoc();
Level lvl = op.getLevel();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
@@ -1098,7 +1098,7 @@ class SparseToCoordinatesBufferConverter
ConversionPatternRewriter &rewriter) const override {
// Replace the requested coordinates access with corresponding field.
// The view is restricted to the actual size to ensure clients
- // of this operation truly obserview size, not capacity!
+ // of this operation truly observe size, not capacity!
Location loc = op.getLoc();
Level lvl = getSparseTensorType(op.getTensor()).getAoSCOOStart();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
@@ -1119,7 +1119,7 @@ class SparseToValuesConverter : public OpConversionPattern<ToValuesOp> {
ConversionPatternRewriter &rewriter) const override {
// Replace the requested values access with corresponding field.
// The view is restricted to the actual size to ensure clients
- // of this operation truly obserview size, not capacity!
+ // of this operation truly observe size, not capacity!
Location loc = op.getLoc();
auto desc = getDescriptorFromTensorTuple(adaptor.getTensor());
auto mem = desc.getValMemRef();
>From 5b419e14e1f1b6d437930a372ec9c1cd5177fabb Mon Sep 17 00:00:00 2001
From: Aart Bik <ajcbik at google.com>
Date: Mon, 6 May 2024 19:22:36 -0700
Subject: [PATCH 3/3] loose compressed can have extra element
---
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
index e03dbb2ea8f5cc..f4ae33a42d06a8 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
@@ -93,7 +93,7 @@ module {
// CHECK-NEXT: nse = 12
// CHECK-NEXT: dim = ( 3, 8 )
// CHECK-NEXT: lvl = ( 3, 8 )
- // CHECK-NEXT: pos[1] : ( 0, 4, 4, 8, 8, 12, )
+ // CHECK-NEXT: pos[1] : ( 0, 4, 4, 8, 8, 12,
// CHECK-NEXT: crd[1] : ( 2, 3, 5, 7, 1, 2, 4, 7, 0, 2, 4, 5, )
// CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, )
// CHECK-NEXT: ----
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